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Legacy Spartan selection and lifecycle guide

Historical selection guide covering Spartan-II/IIE and Spartan-3 branches; use family data sheets and discontinuation notices for exact parts.

Product lines are representative. Stock, lifecycle, package and grade must be checked against the exact MPN.

Legacy Spartan selection and lifecycle guide — technical selection diagram
Technical schematicFPGA.io technical schematic for Legacy Spartan selection and lifecycle guide. Use the listed checks with the manufacturer documentation. This is an abstract diagram, not a product photograph, package drawing or pinout. Technical reference ↗
Product scopeChips & IP
Device references in this category14
Documented ordering codes26
Information checked2026-09-28

FROM FAMILY TO DEVICE

Chip models in Legacy Spartan selection and lifecycle guide

Documented device references

Base-device names are distinct from full ordering numbers. Each detail page identifies the product type, parameter scope and official source.

BASE DEVICE

XC2S200

Spartan-II base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.

Logic cells
5292 cells
Configurable logic blocks
1176 CLBs
Block RAM
56 Kbit (1024 bits)
1 ordering codeXC2S200-5FGG456C →
Specifications & documents →

BASE DEVICE

XC2S600E

Spartan-IIE base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.

Logic cells
15552 cells
Configurable logic blocks
3456 CLBs
Block RAM
288 Kbit (1024 bits)
0 ordering codesExact ordering-code evidence is still being collected.
Specifications & documents →

BASE DEVICE

XC3S200

Spartan-3 base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.

Equivalent logic cells
4320 cells
Configurable logic blocks
480 CLBs
Block RAM
216 Kbit (1024 bits)
1 ordering codeXC3S200-4FTG256C →
Specifications & documents →

BASE DEVICE

XC3S250E

Spartan-3E base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.

Equivalent logic cells
5508 cells
Configurable logic blocks
612 CLBs
Block RAM
216 Kbit (1024 bits)
1 ordering codeXC3S250E-4TQG144I →
Specifications & documents →

BASE DEVICE

XC3S500E

Spartan-3E base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.

Equivalent logic cells
10476 cells
Configurable logic blocks
1164 CLBs
Block RAM
360 Kbit (1024 bits)
1 ordering codeXC3S500E-4PQ208C →
Specifications & documents →

BASE DEVICE

XC3SD1800A

Spartan-3A DSP base device for legacy design maintenance, with DSP48A arithmetic slices. Package, speed and temperature suffixes are required to identify an orderable part.

Equivalent logic cells
37440 cells
Configurable logic blocks
4160 CLBs
Block RAM
1512 Kbit (1024 bits)
Specifications & documents →

14 device references

SELECTION CONTEXT

Working with Legacy Spartan selection and lifecycle guide

Identify the architecture, recover the original design environment, and check the board before choosing a maintenance or migration path. The linked devices are documented base models for engineering reference.

Choose the correct Spartan generation

Suffixes identify meaningful architectural differences. Compare the original board and HDL against the matching data sheet before using a similar device name.

FamilyArchitectural distinctionBoard / tool decisionDevice examples
Spartan-II2.5 V core, DLL clock management and 4-Kbit block memories.Check older power rails and external configuration.XC2S50 →XC2S200 →
Spartan-IIE1.8 V core with differential I/O support; an independent obsolete family.Check bank assignments and the XCN12026 affected-part tables.XC2S100E →XC2S600E →
Spartan-3Dedicated 18 x 18 multipliers, DCMs and 18-Kbit block RAM.Preserve multiplier, RAM and clock primitive behavior.XC3S200 →XC3S1000 →
Spartan-3EMore logic per I/O than the original Spartan-3 design emphasis, with enhanced multipliers and configuration options.Check package-specific input-only pins and density migration notes.XC3S250E →XC3S500E →
Spartan-3AAn I/O-oriented branch with power-management modes and revised configuration features.Verify bank supplies, auxiliary supply and boot connections.XC3S200A →XC3S1400A →
Spartan-3ANAdds integrated SPI configuration flash to the Spartan-3A architecture.Reserve flash pages for configuration and verify boot mode.XC3S200AN →XC3S1400AN →
Spartan-3A DSPReplaces simple multiplier blocks with DSP48A slices containing a pre-adder and accumulator; increases RAM capacity.Match arithmetic widths, pipeline latency and RAM ports.XC3SD1800A →XC3SD3400A →

Sources: DS001 ↗ DS077 ↗ DS099 ↗ DS312 ↗ DS529 ↗ DS557 ↗ DS610 ↗

Read capacity and package limits together

A base model is only the device portion of an ordering number. Select the package, speed grade and temperature range separately. The resource table describes silicon capacity; it does not guarantee that every package exposes the listed maximum I/O.

  • Use CLB, block RAM and arithmetic-block counts when estimating fit. Equivalent logic cells and historical system gates are different metrics.
  • Spartan-II maximum I/O excludes four global clock/user-input pins; Spartan-IIE includes them. Keep those definitions visible when comparing.
  • Within Spartan-3A DSP, XC3SD3400A has more logic and DSP but fewer maximum user I/O than XC3SD1800A. Verify the actual package pin table.
  • Spartan-3AN total flash includes configuration storage. Use the detailed flash table and page alignment when calculating remaining space.

Sources: DS001 ↗ DS077 ↗ DS099 ↗ DS557 ↗ DS610 ↗

Recover the supported toolchain first

The ISE 14.7 architecture table covers Spartan-3, 3E, 3A, 3AN and 3A DSP. Spartan-II and Spartan-IIE are absent from that table, so preserve and verify their earlier project tool version instead of assuming that the latest ISE installer covers them.

  • ISE 14.7 WebPACK covers Spartan-3 through XC3S1500(L), all 3E/3A/3AN, and XC3SD1800A. XC3SD3400A requires an appropriate other ISE edition under the published support table.
  • AMD describes ISE as sustaining software with no further planned ISE releases. Archive installers, service packs, IP licenses, generated cores, UCF files and known-good bitstreams.
  • The ISE 14.7 VM guide documents Oracle Linux guests and specific Windows/VirtualBox combinations. Check the current guide before recreating a host.
  • A move to Vivado is a device and design migration. UG911 warns that Vivado 2022.1 onward does not read projects containing ISE technology; do not plan on a one-click legacy-project import.

Sources: UG631 ↗ ISE-DOWNLOAD ↗ UG1227 ↗ UG911-IMPORT ↗

Apply lifecycle notices to the exact family

XCN23009 covers listed XC/XA Spartan-II and Spartan-3/3E/3A/3AN/3A DSP device/packages, including the specified grades and SCD variants. It set final orders for 29 June 2024 and final deliveries for 28 December 2024, and must be read with earlier notices. Spartan-IIE is separately obsolete under XCN12026, with final orders on 31 May 2013 and final deliveries by 30 September 2014.

  • Match the full ordering code to the affected-part table. A data sheet retained online is documentation, not evidence of current manufacture or stock.

Sources: XCN23009 ↗ XCN12026 ↗ DS077 ↗

A practical migration workflow

Treat this as an engineering checklist derived from the cited manuals. A successful rebuild of the old project provides the reference for validating a new device.

  1. Recover a reproducible baseline. Collect the exact device/package code, schematic, pin constraints, clocks, IP versions and programming files. Rebuild and record functional and timing results
  2. Inventory architecture dependencies. List DLL/DCM instances, block-memory widths and initialization, multiplier or DSP48A primitives, internal flash access and startup sequencing
  3. Choose the target from board requirements. Budget bank voltages, pin types, usable I/O, configuration storage, RAM and arithmetic throughput before comparing logic capacity. Plan board changes where supplies or pinouts differ
  4. Port RTL, IP and constraints. Replace architecture-specific primitives or regenerate IP for the target. Rebuild timing constraints in XDC, reviewing generated clocks, I/O delays and asynchronous clock groups; UCF and XDC timing semantics differ
  5. Validate the complete system. Compare simulation behavior, routed timing and hardware startup against the baseline. Exercise programming, reset, clock loss, memory contents and external interfaces before accepting the migration

Sources: UG631 ↗ DS001 ↗ DS077 ↗ DS099 ↗ DS312 ↗ DS529 ↗ DS557 ↗ DS610 ↗ UG911-IMPORT ↗ UG911-CONSTRAINTS ↗ UG911-MAPPING ↗

ENGINEERING DECISIONS

What to confirm before selection

Use these checks to define the requirement. Family names alone do not establish performance, package compatibility or current availability.

  1. Identify the exact generation, base device and complete package/speed/temperature ordering code.
  2. Apply XCN12026 to Spartan IIE and XCN23009 to the specified Spartan II/3 device/packages.
  3. Recover the original supported ISE release; the ISE 14.7 device list does not include Spartan II/IIE.
  4. Check power rails, I/O-bank assignments, configuration storage and clock/RAM/DSP primitives before migration.

Move from family to full ordering number

Identify the complete manufacturer part number, package, operating grade and electrical requirements. Reviewed FPGA specifications can then be compared at device level.

Browse reviewed FPGA device data →

Preparing a complete board?

Bring the BOM, schematic constraints, stack-up and assembly requirements into the project brief.

PCBA project preparation →

EVIDENCE & DEVELOPMENT

Documents for this product line

Start with the device table, then check electrical limits, ordering information and the applicable tool release.

Legacy FPGA and CPLD Product Discontinuation Notice, v1.1 (2024-01-29)Scope, p. 1; Table 3, p. 2; Table 5, pp. 3-5; final-order and final-delivery dates, p. 5PDF ↗Spartan-II FPGA Family Data Sheet, v2.9 (2021-03-12)Table 1, p. 2; Table 2, p. 4; Ordering Information, p. 5PDF ↗Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09)Table 1, p. 3; Table 2, p. 5; Revision History, p. 7PDF ↗Spartan-IIE and other legacy products: Product Discontinuation Notice, v1.0.2 (2013-04-24)Scope and final-order dates, p. 1; Table 2, pp. 2-3PDF ↗Spartan-3 FPGA Family Data Sheet, v3.1 (2013-06-27)Table 1 and notes, p. 2; package and pinout tablesPDF ↗Spartan-3A FPGA Family Data Sheet, v2.1 (2018-12-18)Table 1 and notes, p. 3; Architectural Overview and configurationPDF ↗Spartan-3AN FPGA Family Data Sheet, v4.3 (2019-01-09)Table 2 and notes, p. 2; Configuration and In-System Flash Memory, Table 3, p. 4PDF ↗Spartan-3E FPGA Family Data Sheet, v4.2 (2018-12-14)Table 1 and notes, p. 2; package and footprint migration tablesPDF ↗Spartan-3A DSP FPGA Family Data Sheet, v3.0 (2010-10-04)Table 1, p. 2; Architectural Overview, p. 3PDF ↗ISE Design Suite 14: Release Notes, Installation, and Licensing, v14.7 (2020-07-10)Architecture Support, Table 2-1, p. 8PDF ↗ISE 14.7 VM for Windows 10 & 11 User Guide, revision 14.8 (2025-05-16)Introduction: ISE 14.7 device scope and host/VirtualBox requirementsWeb ↗AMD ISE Legacy Tools and Utilities - 14.7Legacy Tools and Utilities: sustaining-phase statementWeb ↗ISE to Vivado Migration Guide: Importing an XISE Project (2024.1)Import limitations beginning with Vivado 2022.1; unsupported .ise and UCF constraintsWeb ↗ISE to Vivado Migration Guide: Differences Between XDC and UCF Constraints (2024.1)Clock relationships, sequential precedence and object differencesWeb ↗ISE to Vivado Migration Guide: UCF to XDC Mapping (2024.1)UCF to XDC Mapping, Table 1Web ↗
More AMD / Xilinx development resources

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Compare FPGA architecture generations and find automotive, defense, and space-grade branches.

These broader manufacturer resources do not establish support or compatibility for every device on this page.

PRACTICAL QUESTIONS

Legacy Spartan selection and lifecycle guide selection questions

Is XC3S500E a complete ordering number?

No. It identifies the base device. The full ordering code also specifies the speed grade, package and temperature range; verify those fields in DS312 before matching a BOM.

Sources: DS312 ↗

Can Spartan-3A directly replace Spartan-3AN?

Some corresponding packages have pin compatibility, but Spartan-3AN integrates configuration flash. A 3A replacement needs an external configuration source and a review of boot connections and power requirements.

Sources: DS529 ↗ DS557 ↗

Can Vivado rebuild a Spartan-3 bitstream?

Spartan-3 devices use the ISE flow. Moving to Vivado requires a supported target device and porting the design and constraints; legacy project import alone does not establish device support.

Sources: UG631 ↗ UG911-IMPORT ↗

Does the larger Spartan-3A DSP device offer more I/O?

No. DS610 lists 519 maximum user I/O for XC3SD1800A and 469 for XC3SD3400A. Check the package table for the actual number available to the board.

Sources: DS610 ↗

Are these pages showing available inventory?

No. They document device resources and primary references. Lifecycle is governed by the applicable notice, while remaining inventory requires separate verification for the complete ordering code.

Sources: XCN23009 ↗ XCN12026 ↗

Why is Spartan-IIE listed separately from Spartan-II?

They use different core voltages and I/O features. Their lifecycle evidence also differs: DS077 marks Spartan-IIE obsolete under XCN12026, whereas listed Spartan-II products appear in XCN23009.

Sources: DS001 ↗ DS077 ↗ XCN12026 ↗ XCN23009 ↗

Is a base-device name enough to place an order?

A base-device identifier identifies the silicon or model, but may omit package, speed, temperature, qualification and packing options. Use the manufacturer ordering table to establish the complete code. Reference examples do not establish stock or an approved replacement.

Can the listed devices use the same PCB or development tools?

A shared family or manufacturer does not establish pin compatibility. Compare pinout, supply and I/O-bank voltages, configuration, timing, tool support and thermal limits before changing a board.

What should I include for sourcing or PCBA review?

Provide the exact part or board revision, quantity, delivery requirement, operating environment and traceability needs. For assembly, identify BOM readiness, PCB stack-up, programming access and the inspection or functional-test scope.

PREPARE A USEFUL INQUIRY

Build your selection brief.

Select the points you want our team to review. Your selections stay in this browser until you choose to submit the quotation form.

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Sources & portfolio context

AMD / Xilinx Legacy Spartan selection and lifecycle guide reference ↗

Source review: 2026-09-28. This family guide does not assert stock or compatibility between devices.

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