Board data
Gerber / ODB++ outputs, drill data, Stack-up, impedance requirements, dimensions, finish and fabrication notes. State the drawing revision.
DEFINE THE BUILD
Engineering review
Turn device selection and board requirements into a reviewable project brief.
CONTROLLED DESIGN INPUTS
Prepare a reviewable package.
Start with non-confidential requirements. Agree an NDA and secure file-transfer route before sharing controlled design files.
Components & assembly
Complete MPNs, quantities, approved alternates, BOM revision, pick-and-place data, assembly drawing and any supplied components.
Acceptance & delivery
Required inspection class, test plan, programming files, fixtures, traceability records, delivery destination and requested date.
Check manufacturing file readiness → · Download editable project worksheets →
FROM REQUIREMENT TO QUOTATION
A clear project handoff.
One request connects the chip, the board and the evidence your team needs.
- 01
Send the outline
Full part number, board revision, quantity and the requested schedule.
- 02
Review the scope
Assess the BOM, manufacturing inputs and inspection requirements.
- 03
Approve the quotation
Confirm cost, lead time, process exceptions and acceptance criteria.
- 04
Build & document
Follow the agreed build, release and reporting requirements.
Bring the chip and board into one review.
Include the complete MPN, build quantity and board revision.
PREPARE THE ENGINEERING HANDOFF
Selection evidence and manufacturing decisions.
These guides connect the device record to the information a board review needs. Use the official revision applicable to your exact ordering number.
Compare the architecture before comparing resource counts
AMD logic cells, Altera logic elements and Lattice LUT4 figures describe different structures. A larger headline number does not establish that the same HDL design will fit or meet timing. Keep the primitive definition, memory organization and DSP mode with every resource requirement.
- Record the complete MPN and select the actual package. Device-wide I/O maxima do not establish the pins available in that package.
- Separate memory capacity from block organization. A 36 Kb block, an M9K and an 18 Kb EBR offer different configurations; parity, port modes and write enables matter.
- Use matching resource units for the initial budget, then confirm synthesis, timing and power in the target toolchain. Channel counts alone do not confirm a serial protocol or line rate.
Primary references: AMD 7-series overview; Altera Cyclone IV handbook; Lattice ECP5 data sheet.
Carry the package evidence into the PCB review
A package code is an ordering identifier. Do not use its numeric suffix as a substitute for the mechanical drawing or pinout. For example, the reviewed AMD FFG901 reference has 900 solder balls, while Lattice TG144 is a 144-pin TQFP. Lead count, ball count and user I/O answer different questions.
Before agreeing fabrication, identify the exact footprint revision, used signals, power and ground connections, configuration pins, reference planes, impedance requirements and candidate via process. Define materials and test requirements in the same board revision. Ball pitch alone cannot determine an acceptable stack-up or manufacturing process.
Start with a source-linked BGA reference or a leaded-package reference, then use the escape checklist and stack-up brief for a PCB fabrication review.
A reviewable manufacturing release package
Use one board revision across the fabrication data, drill files, BOM, placement data, assembly drawings and programming/test plan. List approved alternatives explicitly and preserve complete FPGA ordering numbers. Record any omitted or preliminary deliverable so it cannot be mistaken for a released input.
The quote should identify component sourcing responsibilities, fabrication construction, assembly scope, required inspections, test procedures, pass/fail criteria and delivery records. The presence of a file is a preparation check; content, DFM and process acceptance require review.
ILLUSTRATIVE DELIVERABLE — NOT A CUSTOMER CASE
Research prototype: review record example
| Project item | Example review record |
|---|---|
| Design identity | Board revision A; exact FPGA MPN to be confirmed by the project team. |
| Input package | BOM, placement, fabrication and test-plan revision list; unresolved items assigned before quotation. |
| Scope decisions | Component sourcing, agreed PCB construction, assembly, programming and defined tests. |
| Release evidence | Approved scope, recorded file revisions, agreed inspection/test results and shipment documentation. |
This example shows how a review can be recorded. It is not evidence of a completed customer project, certification or manufacturing capability.