BASE DEVICE
XC2S50
Spartan-II base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.
- Logic cells
- 1728 cells
- Configurable logic blocks
- 384 CLBs
- Block RAM
- 32 Kbit (1024 bits)
AMD / Xilinx / TECHNICAL REFERENCE
XC2S600E
Spartan-IIE base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.
FPGA.io Part Number FIO-C203CB0164B63162Internal catalogue reference · manufacturer MPN remains unchanged
Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28
DOCUMENTED FACTS
Technical parameters
Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.
| Parameter | Documented value | Source & conditions |
|---|---|---|
| Logic cells | 15552 cells | Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09) ↗Table 1, p. 3, XC2S600E row |
| Configurable logic blocks | 3456 CLBs | Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09) ↗Table 1, p. 3, XC2S600E row |
| Block RAM | 288 Kbit (1024 bits) | Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09) ↗Table 1, p. 3, XC2S600E row |
| Distributed RAM | 221184 bits | Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09) ↗Table 1, p. 3, XC2S600E row |
| Delay-locked loops | 4 DLLs | Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09) ↗Table 1, p. 3, XC2S600E row; Features on same page |
| Maximum user I/O | 514 pins | Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09) ↗Table 1, p. 3, XC2S600E row; includes four global clock/user-input pins; package dependent |
Official documents
Spartan-IIE FPGA Family Data Sheet, v3.0 (2013-08-09)Table 1, p. 3; Table 2, p. 5; Revision History, p. 7PDF ↗Spartan-IIE and other legacy products: Product Discontinuation Notice, v1.0.2 (2013-04-24)Scope and final-order dates, p. 1; Table 2, pp. 2-3PDF ↗Ordering and board constraints
This reference identifies a base device. Package, speed grade, temperature, qualification and packing suffixes have not been inferred.
- Check the 1.8 V core supply and differential-I/O pin allocation.
- Use the archived project tool version; confirm the obsolete device/package against XCN12026.
- Confirm current availability and lifecycle for the complete code before procurement.
- Review pinout, electrical conditions and the exact document revision before PCB release.
Prepare a complete request
Include the full ordering code, quantity, delivery requirement and traceability needs. For an assembled board, include BOM revision, programming and test scope.
Request this device ↗Series & categories
COMPLETE PART IDENTITIES
Ordering numbers for XC2S600E
These references belong to this device. Evidence labels distinguish reviewed specifications, public listings and manufacturer coding examples. Counts describe this site’s documented coverage, not stock or all configurations offered by the manufacturer.
Exact ordering code requires confirmation
This bounded review did not verify a literal full ordering code. This does not establish that no code exists. Package, speed and temperature matrices were not expanded.
Request an exact-code review →Other devices in this product line
Compare the documented requirements; inclusion in the same series does not establish interchangeability.
BASE DEVICE
XC2S100E
Spartan-IIE base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.
- Logic cells
- 2700 cells
- Configurable logic blocks
- 600 CLBs
- Block RAM
- 40 Kbit (1024 bits)
2 ordering codesXC2S100E-6FTG256C →XC2S100E-6TQ144C →
Specifications & documents →BASE DEVICE
XC2S200
Spartan-II base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.
- Logic cells
- 5292 cells
- Configurable logic blocks
- 1176 CLBs
- Block RAM
- 56 Kbit (1024 bits)
1 ordering codeXC2S200-5FGG456C →
Specifications & documents →BASE DEVICE
XC3S200
Spartan-3 base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.
- Equivalent logic cells
- 4320 cells
- Configurable logic blocks
- 480 CLBs
- Block RAM
- 216 Kbit (1024 bits)
1 ordering codeXC3S200-4FTG256C →
Specifications & documents →BASE DEVICE
XC3S200A
Spartan-3A base device for legacy design maintenance. Package, speed and temperature suffixes are required to identify an orderable part.
- Equivalent logic cells
- 4032 cells
- Configurable logic blocks
- 448 CLBs
- Block RAM
- 288 Kbit (1024 bits)
2 ordering codesXC3S200A-4FT256C →XC3S200A-4VQG100C →
Specifications & documents →BASE DEVICE
XC3S200AN
Spartan-3AN base device for legacy design maintenance, with integrated configuration flash. Package, speed and temperature suffixes are required to identify an orderable part.
- Equivalent logic cells
- 4032 cells
- Configurable logic blocks
- 448 CLBs
- Block RAM
- 288 Kbit (1024 bits)