FPGA.io / ENGINEERING WORKBENCH

Engineering tools.
From selection to build.

Calculate a design requirement, check your inputs or prepare an engineering brief. Find the tool by the task you need to complete.

Browser-local calculations Your inputs are processed on this device.Visible methods & limits Check assumptions before using a result.Explicit sharing Send a project only after reviewing the RFQ.

Find a tool

12 available tools shown

Reset filters

Catalogue checkT001

Full MPN check

Check an exact ordering number against the reviewed FPGA.io catalogue.

What you get: Exact-match record or an unconfirmed-MPN note

FPGA selectionOpen tool →

CalculatorT003

FPGA resource budget

Check a design quantity against a capacity target with reserved headroom.

What you get: Usable target, utilization and resource shortfall

FPGA selectionOpen tool →

CalculatorT005

User I/O budget

Add single-ended signals, differential pairs, clocks and reserved user I/O.

What you get: Total user-I/O demand with allocation checks

FPGA selectionOpen tool →

CalculatorT009

BRAM organization estimate

Estimate the block-count lower bound for a legal memory primitive configuration.

What you get: Block-count lower bound and unused bit capacity

FPGA selectionOpen tool →

CalculatorT013

Configuration storage budget

Budget storage from an official or generated bitstream size and the required images.

What you get: Byte budget for complete configuration images

FPGA selectionOpen tool →

CalculatorT021

Power rail budget

Build a supply budget from stated voltage, current and converter efficiency assumptions.

What you get: Rail load, total input power and margin budget

Power & thermalOpen tool →

CalculatorT044

Trace propagation estimate

Convert a physical trace length to delay using an explicitly supplied propagation velocity.

What you get: One-way delay from length and stated velocity

Timing & interfacesOpen tool →

Brief builderT061

Stack-up requirements brief

Turn target construction and interface requirements into a fabrication review brief.

What you get: A construction brief with unresolved fabrication requirements

PCB design & fabricationOpen tool →

Review checklistT063

BGA escape review checklist

Prepare the evidence needed for a package fan-out and fabrication discussion.

What you get: Package, fan-out and via-process review items

PCB design & fabricationOpen tool →

Review checklistT141

BOM completeness check

Check pasted BOM rows for missing values, quantity mismatches and duplicate references.

What you get: Row issues, missing values and duplicate references

BOM & sourcingOpen tool →

Brief builderT166

Power-on test planning checklist

Outline a staged board bring-up plan and identify the engineering limits still needed.

What you get: A staged bring-up review draft with open limits

Programming & testOpen tool →

Review checklistT181

Manufacturing file package check

Check whether the required project deliverables have been declared ready.

What you get: Declared deliverables and unresolved file requirements

Project handoffOpen tool →

A RESULT YOU CAN REVIEW

Know what the output means.

Check the method. Every available tool shows its calculation or rule, input bounds and a reference example.
Keep the conditions. Unknown values are not silently treated as zero. Results retain the assumptions and unresolved review items.
Use the right next step. Download the report, open a related worksheet or transfer an editable brief to project enquiry.

These are planning calculators and review aids. They do not establish device compatibility, DFM acceptance, stock availability or engineering sign-off.

DEVELOPMENT ROADMAP

Designed to grow across ten disciplines.

The research backlog contains 200 candidate tasks, including the existing tools and comparison workflow. Candidates may be merged or deferred. No release date or validated method is implied.

FPGA selection5 available

Device identity, logic, I/O and memory resources.

Future candidates: FIFO sizing · I/O-bank planning · Toolchain support.