How this works
Record full MPN, pitch, used I/O and candidate via process; produce a review checklist. No layer count or geometry is inferred from pitch.
PCB design & fabrication / T063
Prepare the evidence needed for a package fan-out and fabrication discussion.
01 / DEFINE THE REQUIREMENT
02 / REVIEW THE OUTPUT
Ready for an example run. Check the inputs, then run the tool.
Package, fan-out and via-process review items
The report records the tool version and calculation time. Project enquiry opens a separate form for your review; it does not submit automatically.
03 / METHOD & VERIFICATION
Method version 1 · 2026-09-27
FPGA.io planning aid. Arithmetic and checklist output do not replace device documentation, a design tool or engineering approval.
Record full MPN, pitch, used I/O and candidate via process; produce a review checklist. No layer count or geometry is inferred from pitch.
Pitch 0.05–10 mm; used user I/O 0–10,000. These bounds do not state manufacturing capability. Include power, ground and dedicated pins in the engineering review.
0.5 mm pitch, 100 used I/O, process undecided → request full ball map, stack-up and via-process review.
Use the example inputs to inspect how the method behaves. This is a reference calculation, not a hardware test.
Calculations and pasted lists stay in this browser. No account is required. An enquiry brief is stored temporarily in this tab's session only when you choose to transfer it.
Report a method or input issue →04 / CONTINUE THE TASK
Keep exact device and board revisions with the assumptions you just checked.