AMD / Xilinx / TECHNICAL REFERENCE
ZU39DR
Zynq UltraScale+ RFSoC base device in the documented generation.
FPGA.io Part Number FIO-6007A57F157215B2Internal catalogue reference · manufacturer MPN remains unchanged
Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28
DOCUMENTED FACTS
Technical parameters
Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.
| Parameter | Documented value | Source & conditions |
|---|---|---|
| System logic cells | 930 K | AMD Zynq UltraScale+ RFSoCs ↗Gen 1 / Gen 2 / Gen 3 / DFE Programmable Logic tables; ZU39DR column / System logic cells row |
| DSP slices | 4272 | AMD Zynq UltraScale+ RFSoCs ↗Gen 1 / Gen 2 / Gen 3 / DFE Programmable Logic tables; ZU39DR column / DSP slices row |
| Memory | 60.5 Mb | AMD Zynq UltraScale+ RFSoCs ↗Gen 1 / Gen 2 / Gen 3 / DFE Programmable Logic tables; ZU39DR column / Memory row |
Official documents
AMD Zynq UltraScale+ RFSoCsGen 1 / Gen 2 / Gen 3 / DFE Programmable Logic tablesWeb ↗Ordering and board constraints
This reference identifies a base device. Package, speed grade, temperature, qualification and packing suffixes have not been inferred.
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COMPLETE PART IDENTITIES
Ordering numbers for ZU39DR
These references belong to this device. Evidence labels distinguish reviewed specifications, public listings and manufacturer coding examples. Counts describe this site’s documented coverage, not stock or all configurations offered by the manufacturer.
| Full ordering number | Package | Speed / temperature | Evidence | Next step |
|---|---|---|---|---|
| XCZU39DR-2FFVF1760I4992 | Not verified | Not verifiedNot verified | Distributor-listed identityView source ↗ | Device details →Request quotation |
1 of 1 codes shown
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Not verified means that parameter has not been independently established for this exact code. A code example is not confirmation that a configuration can be ordered today.