Moore Threads / 摩尔线程 / TECHNICAL REFERENCE

春晓

Named Moore Threads GPU silicon based on the first MUSA architecture, with general-purpose and tensor computation. This reference identifies the chip used in MTT products; it is not an MTT board ordering record.

FPGA.io Part Number FIO-8622D30E5D9F3B76Internal catalogue reference · manufacturer MPN remains unchanged

Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28

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春晓 — technical feature overview — Technical schematicFPGA.io technical schematic for 春晓. Values summarize the documented fields below; consult their source conditions. This is an abstract diagram, not a product photograph, package drawing or pinout. Parameter sources below ↓

DOCUMENTED FACTS

Technical parameters

4 source-linked fields

Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.

Parameter	Documented value	Source & conditions
GPU architecture	First-generation MUSA	Moore Threads GPU cloud-native suite white paper, v1.9.0 ↗摩尔线程“春晓”
Transistor count	22 billion	Moore Threads GPU cloud-native suite white paper, v1.9.0 ↗摩尔线程“春晓”
Compute engines	General-purpose MUSA cores and tensor computation cores	Moore Threads GPU cloud-native suite white paper, v1.9.0 ↗摩尔线程“春晓”
Named numerical formats	FP32, FP16 and INT8	Moore Threads GPU cloud-native suite white paper, v1.9.0 ↗摩尔线程“春晓”

Official documents

Moore Threads GPU cloud-native suite white paper, v1.9.0GPU芯片和服务器端显卡简介 / 摩尔线程“春晓”Web ↗Moore Threads MTT S3000 product pageIntroduction: MTT S3000 uses the Chunxiao chip and MUSA architecture; MUSA架构 block explicitly identifies 全新“春晓”芯片Web ↗

Ordering and board constraints

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Series & categories

GPU silicon →MTT GPU silicon platform →MUSA architecture →

COMPLETE PART IDENTITIES

Ordering numbers for 春晓

0 documented codes

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Platform identity & ordering route

The cited manufacturer architecture material identifies a GPU silicon/design codename. It does not establish a public packaged-chip ordering code. Graphics-card, accelerator-card and system product numbers are separate products and are not substituted.

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