GigaDevice / 兆易创新 / TECHNICAL REFERENCE

GD30AP321N

Single-channel analog operational amplifier.

FPGA.io Part Number FIO-240F6FBE67B0D229Internal catalogue reference · manufacturer MPN remains unchanged

Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28

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GD30AP321N — technical feature overview — Technical schematicFPGA.io technical schematic for GD30AP321N. Values summarize the documented fields below; consult their source conditions. This is an abstract diagram, not a product photograph, package drawing or pinout. Parameter sources below ↓

DOCUMENTED FACTS

Technical parameters

4 source-linked fields

Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.

Parameter	Documented value	Source & conditions
Single supply range	1.8–5.5 V	GigaDevice operational amplifier selector ↗GD30AP321N row
Channels	1 channel	GigaDevice operational amplifier selector ↗GD30AP321N row
Gain bandwidth	1.2 MHz	GigaDevice operational amplifier selector ↗GD30AP321N row
Slew rate	1 V/µs	GigaDevice operational amplifier selector ↗GD30AP321N row

Official documents

GigaDevice operational amplifier selectorGD30AP321N rowWeb ↗

Ordering and board constraints

This reference identifies a base device. Package, speed grade, temperature, qualification and packing suffixes have not been inferred.

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Series & categories

analog ICs →

COMPLETE PART IDENTITIES

Ordering numbers for GD30AP321N

0 documented codes

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Exact ordering code requires confirmation

The cited public material did not establish a literal complete ordering row in this pass. This is an evidence limit, not a claim that no code exists. The existing device identity is retained; no suffix combinations, neighboring chips, boards or systems are substituted.

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