GigaDevice / 兆易创新 / TECHNICAL REFERENCE

GD5F1GQ5UE

SPI NAND flash with an x1/x2/x4 I/O bus.

FPGA.io Part Number FIO-88A8637CE117D406Internal catalogue reference · manufacturer MPN remains unchanged

Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28

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GD5F1GQ5UE — technical feature overview — Technical schematicFPGA.io technical schematic for GD5F1GQ5UE. Values summarize the documented fields below; consult their source conditions. This is an abstract diagram, not a product photograph, package drawing or pinout. Parameter sources below ↓

DOCUMENTED FACTS

Technical parameters

4 source-linked fields

Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.

Parameter	Documented value	Source & conditions
Density	1 Gb	GigaDevice GD5F1GQ5UE ↗Features
Supply range	2.7–3.6 V	GigaDevice GD5F1GQ5UE ↗Features
Maximum clock frequency	133 MHz	GigaDevice GD5F1GQ5UE ↗Features
Page size	2 KB	GigaDevice GD5F1GQ5UE ↗Features

Official documents

GigaDevice GD5F1GQ5UEFeaturesWeb ↗

Ordering and board constraints

This reference identifies a base device. Package, speed grade, temperature, qualification and packing suffixes have not been inferred.

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Series & categories

NAND flash →

COMPLETE PART IDENTITIES

Ordering numbers for GD5F1GQ5UE

0 documented codes

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Exact ordering code requires confirmation

The cited public material did not establish a literal complete ordering row in this pass. This is an evidence limit, not a claim that no code exists. The existing device identity is retained; no suffix combinations, neighboring chips, boards or systems are substituted.

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