Zhaoxin / 兆芯 / TECHNICAL REFERENCE

KH-40000/32

32-core Kaisheng server processor identified in Zhaoxin's official system case.

FPGA.io Part Number FIO-CFD2A58B06B329FEInternal catalogue reference · manufacturer MPN remains unchanged

Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28

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KH-40000/32 — technical feature overview — Technical schematicFPGA.io technical schematic for KH-40000/32. Values summarize the documented fields below; consult their source conditions. This is an abstract diagram, not a product photograph, package drawing or pinout. Parameter sources below ↓

DOCUMENTED FACTS

Technical parameters

3 source-linked fields

Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.

Parameter	Documented value	Source & conditions
Cores per processor	32	Zhaoxin: Thunderobot Borei FX2-Z1UC1 server case ↗Product specifications / processor
Base clock	2.0 GHz	Zhaoxin: Thunderobot Borei FX2-Z1UC1 server case ↗Product specifications / processor
Maximum operating clock	2.5 GHz	Zhaoxin: KH-40000 intelligent video production solution ↗Thunderobot Borei FX2: dual KH-40000/32 processors, 2.0 GHz, maximum 2.5 GHz

Official documents

Zhaoxin: Thunderobot Borei FX2-Z1UC1 server caseProduct specifications / processorWeb ↗Zhaoxin: KH-40000 intelligent video production solution2024-03-21; Thunderobot Borei FX2 server paragraphWeb ↗

Ordering and board constraints

This reference identifies a base device. Package, speed grade, temperature, qualification and packing suffixes have not been inferred.

Official case material includes partner-supplied system information. Only statements explicitly assigned to the processor are captured; memory slots and expansion slots are system specifications.
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Series & categories

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COMPLETE PART IDENTITIES

Ordering numbers for KH-40000/32

0 documented codes

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Exact ordering code requires confirmation

The cited public material did not establish a literal complete ordering row in this pass. This is an evidence limit, not a claim that no code exists. The existing device identity is retained; no suffix combinations, neighboring chips, boards or systems are substituted.

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