HiSilicon / 海思 / TECHNICAL REFERENCE

Hi3519DV500

HiSilicon intelligent camera SoC with two Cortex-A55 cores, hardware video processing and an INT8 neural-network engine.

FPGA.io Part Number FIO-86EA1F5DB7EE4964Internal catalogue reference · manufacturer MPN remains unchanged

Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28

Request sourcing review ↗View documented parameters ↓

Hi3519DV500 — technical feature overview — Technical schematicFPGA.io technical schematic for Hi3519DV500. Values summarize the documented fields below; consult their source conditions. This is an abstract diagram, not a product photograph, package drawing or pinout. Parameter sources below ↓

DOCUMENTED FACTS

Technical parameters

5 source-linked fields

Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.

Parameter	Documented value	Source & conditions
CPU	Dual Arm Cortex-A55 at 1000 MHz	HiSilicon Hi3519DV500 4K30 AI camera chip ↗关键特性 / 处理器内核
Neural-network acceleration	Up to 2.5 TOPS INT8	HiSilicon Hi3519DV500 4K30 AI camera chip ↗丰富的视觉AI计算能力
Video codecs	H.264 and H.265 encoding/decoding at 4K30	HiSilicon Hi3519DV500 4K30 AI camera chip ↗高性能4K30处理能力
Sensor serial input	8 lanes; MIPI, LVDS, Sub-LVDS or HiSPi	HiSilicon Hi3519DV500 4K30 AI camera chip ↗关键特性 / 视频输入接口
Sensor input count	Up to 4 sensors	HiSilicon Hi3519DV500 4K30 AI camera chip ↗关键特性 / 视频输入接口

Official documents

HiSilicon Hi3519DV500 4K30 AI camera chipProduct introduction and 关键特性Web ↗

Ordering and board constraints

This reference identifies a base device. Package, speed grade, temperature, qualification and packing suffixes have not been inferred.

Check simultaneous codec, ISP and neural-network workloads against the SDK performance tables.
Select sensors and lane topology using the full interface and timing documentation.
Confirm current availability and lifecycle for the complete code before procurement.
Review pinout, electrical conditions and the exact document revision before PCB release.

Prepare a complete request

Include the full ordering code, quantity, delivery requirement and traceability needs. For an assembled board, include BOM revision, programming and test scope.

Request this device ↗

Discuss sourcing + PCBA →

Series & categories

Smart vision →

COMPLETE PART IDENTITIES

Ordering numbers for Hi3519DV500

0 documented codes

These references belong to this device. Evidence labels distinguish reviewed specifications, public listings and manufacturer coding examples. Counts describe this site’s documented coverage, not stock or all configurations offered by the manufacturer.

Exact ordering code requires confirmation

The cited public material did not establish a literal complete ordering row in this pass. This is an evidence limit, not a claim that no code exists. The existing device identity is retained; no suffix combinations, neighboring chips, boards or systems are substituted.

Ordering identity reference ↗

Request an exact-code review →