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Broadcom / TECHNICAL REFERENCE

BCM87424

Single-chip optical PHY with integrated TIA and laser drivers for 400G optical-link implementations.

FPGA.io Part Number FIO-5A1D87113891E244Internal catalogue reference · manufacturer MPN remains unchanged

Technical reference · Base device — ordering suffix not specified · Checked 2026-09-28

BCM87424 — technical feature overview
Technical schematicFPGA.io technical schematic for BCM87424. Values summarize the documented fields below; consult their source conditions. This is an abstract diagram, not a product photograph, package drawing or pinout. Parameter sources below ↓

DOCUMENTED FACTS

Technical parameters

5 source-linked fields

Values apply to the device and conditions identified in each source. Family maxima, package limits and full ordering-code specifications must not be treated as interchangeable.

ParameterDocumented valueSource & conditions
Optical Ethernet rate400 GbEBroadcom BCM87424 PAM-4 optical PHY ↗Overview and Features
Lane mappingFour 106 Gb/s PAM-4 client lanes to four 106 Gb/s line lanesBroadcom BCM87424 PAM-4 optical PHY ↗Overview and Features
Integrated analog blocksTransimpedance amplifier and laser driverBroadcom BCM87424 PAM-4 optical PHY ↗Overview and Features
Reference clock156.25 MHzBroadcom BCM87424 PAM-4 optical PHY ↗Overview and Features
Process technology7 nmBroadcom BCM87424 PAM-4 optical PHY ↗Overview and Features

Official documents

Broadcom BCM87424 PAM-4 optical PHYOverview and FeaturesWeb ↗

Ordering and board constraints

This reference identifies a base device. Package, speed grade, temperature, qualification and packing suffixes have not been inferred.

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Series & categories

COMPLETE PART IDENTITIES

Ordering numbers for BCM87424

0 documented codes

These references belong to this device. Evidence labels distinguish reviewed specifications, public listings and manufacturer coding examples. Counts describe this site’s documented coverage, not stock or all configurations offered by the manufacturer.

Exact ordering code requires confirmation

The cited public material did not establish a literal complete ordering row in this pass. This is an evidence limit, not a claim that no code exists. The existing device identity is retained; no suffix combinations, neighboring chips, boards or systems are substituted.

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