Freeze the environment
Record the release/build, operating system, licence tier and exact target part. Check release notes and the device-support matrix before download.
AMD / Xilinx / Software & tools
Vivado Design Suite
Hardware design tools for RTL entry, IP integration, simulation, synthesis, implementation, and device programming.
Software resource: select the release, host platform, licence and supported target device before installing or migrating a project.
SOFTWARE WORKFLOW
Software release & support
Vivado covers HDL/IP design entry, synthesis, implementation and verification for supported AMD devices. The AMD overview checked on 30 September 2026 identifies release 2026.1 and revised licence tiers. Choose by the exact device and features you need; do not assume an older licence or project automatically covers a new release.
AMD overview and licensing context ↗ · 2026.1 downloads and release documentation ↗
Reproduce one small project
Archive the original project. Open a vendor example for the selected device, resolve IP version warnings and retain synthesis, implementation and timing reports.
Define a migration result
Compare constraints, warnings and timing with the original build. A successful install is not evidence that a project meets timing or a bitstream is safe for your board.
Open the applicable documents ↓ · Prepare an engineering question →
This is a review workflow, not a claim that FPGA.io has tested this release or board. Record your exact revision and acceptance result.
ENGINEERING DECISIONS
What to confirm before selection
Record the exact revision and resolve these requirements against its documentation.
- Check supported devices and the current licensing tier.
- Keep IP versions, constraints, and reproducible build scripts together.
EVIDENCE & DEVELOPMENT
Documents for this product line
Start with the exact product or release documentation, then check the supported devices, interfaces, licences and revision requirements.
More AMD / Xilinx development resources
AMD FPGA portfolio ↗
Compare FPGA architecture generations and find automotive, defense, and space-grade branches.
7 Series selection guide ↗
Official resource and package tables for 7 Series device selection.
UltraScale selection guide ↗
Official UltraScale device and package comparison tables.
UltraScale+ selection guide ↗
Check the precise resource, package, and connectivity combinations in UltraScale+ FPGAs.
Adaptive computing design hubs ↗
Task-oriented documentation entry points for architecture, design, verification, and implementation.
AMD evaluation board catalog ↗
Discover additional AMD and partner boards by device family.
Versal boards and kits ↗
Official guide to VCK190, VMK180, VPK180, VPK120, VHK158, VEK280, and VEK385 platforms.
Kria KD240 drives starter kit ↗
K24-based motor-control and DSP development platform.
Kria KV260 vision starter kit ↗
K26-based entry point for vision application development.
Kria KR260 robotics starter kit ↗
K26-based robotics and industrial development platform.
Kria AI robotics developer platform ↗
Separate Ryzen AI Embedded-based platform for autonomous robotics.
Telco accelerator cards ↗
Application-specific cards and solutions for telecommunications acceleration.
Kintex UltraScale XQR ↗
Space-grade product information; qualification and radiation requirements need exact-device review.
MicroBlaze processor ↗
Soft-processor resources for embedding control software in programmable logic.
Vitis AI developer hub ↗
Current deployment guidance, board targets, and links to legacy DPU documentation.
Vivado licensing FAQ ↗
Check device and feature entitlements, including the licensing changes introduced with 2026.1.
Versal HBM discontinuation notice ↗
AMD's official discontinuation notice for the Versal HBM lineage.
Legacy FPGA and CPLD discontinuation notice ↗
XCN23009 covers specified XC9500XL, CoolRunner, Spartan II, and Spartan 3 product families.
Product lifecycle guidance ↗
Read AMD's family-level longevity statements and the explicit exclusions for integrated-HBM devices.
Adaptive computing support ↗
Search official support answers, knowledge-base articles, and community discussions.
These broader manufacturer resources do not establish support or compatibility for every device on this page.
PRACTICAL QUESTIONS
Vivado Design Suite selection questions
Which product or release should I specify?
Use the exact product name and revision, together with the target device and intended workflow. Hardware design tools for RTL entry, IP integration, simulation, synthesis, implementation, and device programming.
How do I check device support?
Use the manufacturer support matrix, release notes or board documentation for the exact revision. Record the exact target device and version; a shared manufacturer alone does not prove compatibility.
What should be checked before integration?
Confirm the software version, licence, host operating system, device-support package and project or IP migration requirements.
What should I include in a project request?
Describe the application, exact product or revision, target hardware, quantities and delivery requirements. State which components, board manufacturing, programming and test work you need reviewed.
PREPARE A USEFUL INQUIRY
Build your selection brief.
Select the points you want our team to review. Your selections stay in this browser until you choose to submit the quotation form.
Open quotation form →Sources & portfolio context
AMD / Xilinx Vivado Design Suite reference ↗
Source review: 2026-09-28. This family guide does not assert stock or compatibility between devices.
← Complete AMD / Xilinx product mapRelated entries in this category
Vitis unified software platform 1 portfolio entry →Vitis HLS 1 portfolio entry →Vitis AI 1 portfolio entry →Vitis Model Composer 1 portfolio entry →Embedded software: EDF and PetaLinux 1 portfolio entry →Power Design Manager 1 portfolio entry →ROCm software 1 portfolio entry →ISE legacy tools 1 portfolio entry →