IC Package Naming Conventions Decoded: Codes, Suffixes, and JEDEC Outlines
An IC package name carries four stacked layers: a generic family abbreviation, a JEDEC outline that fixes the exact dimensions, a manufacturer’s package designator glued
An IC package name carries four stacked layers: a generic family abbreviation, a JEDEC outline that fixes the exact dimensions, a manufacturer’s package designator glued
A hermetic package seals a die inside an airtight cavity made of metal, ceramic, or glass, blocking the moisture and contaminants that kill high-reliability electronics. Plastic
Nearly every modern FPGA ships in a ball grid array. QFN and wafer-level parts exist, but they are reserved for the smallest, lowest-density devices. The
An electronic component package is the housing that protects a die or element, connects it to the board, and sets the footprint you route to. The
Discrete semiconductor package types fall along two axes: the device lineage they came from — diode outlines (DO, SOD, DO-214) and transistor outlines (TO, SOT)
A chip scale package (CSP) is a single-die IC package whose footprint is no larger than 1.2 times the silicon die it contains. That size
A capacitor package size code describes the part’s footprint, not its capacitance. An 0805 MLCC is 2.0 × 1.25 mm; a tantalum “B” case is
A ceramic IC package seals a semiconductor die inside alumina or aluminum-nitride ceramic, then closes it with a hermetic lid. That construction protects the die
A diode package name encodes two facts: how the part mounts and which size class it belongs to. The common diode package types split into
A crystal or oscillator package size is written as a four-digit code — 3225, 5032, 7050 — that encodes length by width in tenths of