An SDIP (shrink dual in-line package) is a through-hole DIP with a finer lead pitch than the standard part: 1.778 mm (0.070 in) instead of 2.54 mm (0.100 in). The tighter pitch packs more pins into a shorter body, which is why 1980s–90s memory, microcontroller, and video ICs used it. This guide gives the exact pitch, the row-spacing and pin-count options, the naming traps, and how to socket and source one today.
Key takeaways
- An SDIP (shrink DIP) uses a 1.778 mm (0.070 in) lead pitch, versus 2.54 mm (0.100 in) on a standard DIP.
- The finer pitch fits more pins in less length; a 64-pin shrink DIP is about 56 mm long, versus roughly 79 mm for a hypothetical 0.100 in 64-pin part.
- Row (body) spacing runs 300 mil (7.62 mm), 600 mil (15.24 mm), or 750 mil (19.05 mm), rising with pin count; 64-pin shrink DIPs use 0.75 in rows (Harwin).
- Watch the naming: “shrink DIP” (fine pitch) is not a “skinny DIP” (narrow 0.3 in body at standard 0.100 in pitch), and SPDIP is through-hole, not the surface-mount SSOP.
- Shrink DIPs need 0.070 in sockets or footprints; standard 0.100 in DIP sockets do not fit.
- The package is legacy: pin counts top out near 64 and new designs use SMT, so treat SDIP parts as end-of-life and buy from traceable sources.
What is an SDIP (shrink DIP) package?
An SDIP is a dual in-line package whose two rows of leads sit on a 1.778 mm (0.070 in) pitch, finer than the 2.54 mm (0.100 in) pitch of an ordinary DIP (electrical-information; Mill-Max). Everything else is familiar: a rectangular plastic or ceramic body, leads bent down for through-hole insertion, and a pin-1 notch or dot at one end.
[IMAGE 1: an SDIP shrink DIP beside a standard DIP, with lead-pitch callouts (0.070 in vs 0.100 in) and a pin-1 notch | alt: “SDIP shrink dual in-line package beside a standard DIP with lead-pitch callouts”]
The point of the shrink is density. At 0.070 in, a given pin count fits in about 70% of the length, so a high-pin device stays a manageable size on the board and in a socket. Shrink DIP appeared when pin counts on memory and microcontrollers outgrew a practical 0.100 in DIP but surface mount was not yet standard (Mill-Max). The letters vary by vendor: “shrink DIP,” “shrink plastic DIP” (SPDIP), and Microchip’s “SP” body all mean the same 0.070 in pitch.
SDIP vs. DIP: the pitch and size difference
The only defining difference is pitch; that ripples into length, pin count, and tooling.
| Attribute | SDIP (shrink DIP) | Standard DIP |
| Lead pitch | 1.778 mm (0.070 in) | 2.54 mm (0.100 in) |
| Row (body) spacing | 300 / 600 / 750 mil | 300 / 400 / 600 mil |
| Typical pin range | 24–64 (density-driven) | 8–40 (mostly) |
| Body length, same pins | About 30% shorter | Baseline |
| Breadboard-friendly | No | Yes (0.1 in grid) |
| Socket / footprint | 0.070 in only | 0.100 in |
| Era / status | 1980s–90s, legacy | Legacy, still stocked |
A standard DIP maps onto the 0.100 in breadboard grid; a shrink DIP does not, so it needs its own socket or a custom footprint. That single fact causes most shrink-DIP surprises.
SDIP dimensions: pitch, row spacing, and pin counts
Pitch is fixed at 1.778 mm. Row spacing (the center-to-center distance across the two rows, the “body width”) steps with pin count, and it sets which socket fits. Common shrink-DIP bodies, using Microchip’s package-spec designators:
[IMAGE 2: a labeled shrink-DIP dimension drawing showing lead pitch, row spacing, and lead-row length | alt: “Shrink DIP dimensions: 1.778 mm lead pitch, row spacing, and lead-row length”]
| Pin count | Row (body) spacing | Vendor designator (example) |
| 24 | 300 mil (7.62 mm) | SPDIP “SP” 300 mil (Microchip) |
| 28 | 300 mil (7.62 mm) | SPDIP “SP” 300 mil (Microchip) |
| 42 | 600 mil (15.24 mm) | shrink DIP 600 mil |
| 52 | 600–750 mil | shrink DIP |
| 64 | 750 mil (19.05 mm) | shrink DIP “SP/SS” 750 mil (Microchip); socket 0.75 in (Harwin) |
Body length follows from the pitch: with N pins there are N/2 per row, so the pin-1-to-last span is (N/2 − 1) × 1.778 mm. A 28-pin SPDIP spans 13 × 1.778 = 23.1 mm; a 64-pin shrink DIP spans 31 × 1.778 = 55.1 mm, which is why a “DIP-64” measures about 56 mm long (PCBSync) rather than the roughly 79 mm a 0.100 in 64-pin part would need. Lead width and standoff follow ordinary DIP practice; a shrink-DIP socket contact accepts a Ø0.38–0.63 mm lead (Mill-Max).
A naming trap: shrink DIP vs. skinny DIP vs. SPDIP vs. SSOP
“SDIP” is overloaded, and the wrong reading picks the wrong socket.
- Shrink DIP / SPDIP: 0.070 in pitch, through-hole. This is the package this article covers. Microchip labels its 24- and 28-lead parts “Skinny Plastic (SP)” and its 64-lead part “Shrink Plastic,” both at 0.070 in.
- Skinny DIP: a standard 0.100 in-pitch DIP in a narrow 0.300 in (7.62 mm) body, versus the wide 0.600 in body. Same pitch as a normal DIP, just narrower; not a shrink part (electrical-information).
- SSOP (shrink small outline package): a surface-mount shrink package, not through-hole. Some pages wrongly expand SPDIP as “shrink small outline”; that conflates a through-hole DIP with an SMD part, which is a different footprint entirely.
Because vendors mislabel these, distributor listings sometimes tag a 0.070 in part as “PDIP.” Confirm the pitch from the mechanical drawing, not the marketing name (element14 community).
Sockets, footprint, and mounting
A shrink DIP needs 0.070 in hardware end to end.
- Sockets. Use a 0.070 in shrink-DIP socket; a 0.100 in DIP socket will not align. Machined sockets from Mill-Max and Harwin cover 24–64 pins; the Harwin D8864-42 is a 64-way shrink-DIP socket on 0.75 in rows and 0.070 in pitch, taking a Ø0.40–0.56 mm pin, and Mill-Max’s contacts carry 3 A (Harwin; Mill-Max).
- PCB footprint. Place the holes on a 1.778 mm pitch and the correct row spacing, then size the hole from the lead: per IPC-2222, hole = maximum lead diameter + 0.15 to 0.25 mm by producibility level. Watch copper-to-copper clearance, because 0.070 in leaves less room between adjacent pads than 0.100 in.
- Hand assembly. Shrink DIPs still hand-solder, but the tighter pitch bridges more easily; use a fine tip and inspect between pins. Socketing a scarce shrink-DIP part protects it during rework.
Where SDIP was used, and sourcing today
Shrink DIP was a density stopgap for through-hole memory, microcontrollers, video and audio controllers, and some automotive ICs of the 1980s and 1990s (Mill-Max). Once surface mount matured, new devices moved to SOIC, SSOP, QFP, and BGA, and pin counts above roughly 64 went to PGA or QFP; a DIP-64 is already large (PCBSync).
Treat shrink-DIP silicon as end-of-life. It survives in the repair and retro-computing channel, where remarked and mislabeled parts are common; verify the pitch and markings, and buy from traceable sources. For a new design that must stay through-hole, prefer a standard 0.100 in DIP if the pin count allows, or move to SMT; reach for shrink DIP only to match an existing socket or footprint.
Design and handling mistakes
- Assuming 0.100 in. The most common error: ordering a 0.100 in socket or laying a 0.100 in footprint for a 0.070 in part. Check the drawing.
- Breadboarding a shrink DIP. It will not seat on a 0.1 in breadboard; use a 0.070 in-to-0.100 in adapter.
- Trusting the marketing name. “PDIP” on a listing can hide an SPDIP; confirm pitch and row spacing.
- Tight pad spacing. At 0.070 in, annular ring and clearance shrink; follow the IPC hole rule and check the fab’s minimum.
- Bridging on hand-solder. Finer pitch solders closer; inspect between pins.
Frequently asked questions
What does SDIP stand for?
SDIP stands for shrink dual in-line package, a through-hole DIP with a finer lead pitch than standard. It uses 1.778 mm (0.070 in) between pins instead of the usual 2.54 mm (0.100 in), which fits more pins in a shorter body. It is also written SPDIP (shrink plastic DIP).
What is the pin pitch of an SDIP package?
An SDIP has a 1.778 mm (0.070 in) lead pitch, measured center to center between adjacent pins. That is 70% of the 2.54 mm (0.100 in) pitch of a standard DIP. Row (body) spacing is separate and runs 300, 600, or 750 mil depending on pin count.
Is SDIP the same as skinny DIP?
No. Shrink DIP (SDIP/SPDIP) has a finer 0.070 in pitch. A skinny DIP is a standard 0.100 in-pitch DIP in a narrow 0.300 in body, versus the wide 0.600 in body. The names are often confused, so check the pitch on the datasheet drawing before choosing a socket.
Can I put an SDIP chip in a normal DIP socket?
No. A standard DIP socket is on 0.100 in pitch and will not align with the 0.070 in leads of a shrink DIP. Use a dedicated 0.070 in shrink-DIP socket, or a 0.070 in-to-0.100 in adapter if you need breadboard access.
How many pins does an SDIP package have?
Shrink DIPs typically run 24 to 64 pins. Low-count 24- and 28-pin parts use a 0.300 in body; high-count 64-pin parts use a 0.750 in body. Above about 64 pins the package becomes impractical, and designs move to PGA for through-hole or QFP and BGA for surface mount.
The bottom line
Before you socket or lay out an SDIP, confirm one number from the mechanical drawing: the 1.778 mm (0.070 in) pitch. Match the row spacing to the pin count (300 mil for 24–28 pins, up to 750 mil for 64), buy a 0.070 in shrink-DIP socket rather than a standard one, and size the footprint holes from the lead diameter with the IPC-2222 rule. Do not trust a “PDIP” label on a listing; a shrink part hides behind it often enough to matter. For anything new, use a standard DIP if the pin count fits or go surface-mount, and keep shrink DIP for matching legacy hardware.