Microchip FPGA devices—sold under the PolarFire, IGLOO, SmartFusion, and RT product lines—are flash-based programmable logic ICs that power designs from edge-AI cameras to radiation-tolerant satellite payloads. If you came from the Microsemi or Actel era, every one of those part numbers now lives under the Microchip Technology umbrella. This page is your single reference for the full Microchip FPGA product lineup: which series are still active, what specs matter for your board, where to buy them, and how to avoid the PCB-level mistakes that turn a solid FPGA selection into a re-spin.
FPGA.IO stocks and quotes Microchip FPGAs across all active families. Below, you will find the series-by-series breakdown, a practical comparison table, PCB design and SMT assembly considerations specific to these devices, and answers to the procurement questions engineers actually ask.
Key Takeaways for Microchip FPGA Buyers
Flash-based, not SRAM: Every Microchip FPGA stores its configuration in non-volatile flash. That means instant-on in under 1 ms and no external boot PROM to manage or protect.
Power advantage is real and measurable: PolarFire FPGAs consume up to 50% less total power than competing SRAM-based mid-range devices at equivalent logic density, per Microchip’s published EEMBC CoreMark-Pro benchmarks.
Naming lineage matters for procurement: Microsemi bought Actel in 2010; Microchip bought Microsemi in 2018. Old Actel and Microsemi part numbers (A3P, AX, APA, M2S, M2GL) still ship, but they appear under Microchip datasheets now.
Rad-tolerant portfolio is uniquely deep: RT PolarFire, RTG4, RTAX, and RT ProASIC 3 form the broadest radiation-hardened FPGA lineup from any single vendor—key if you bid defense or space programs.
PCB design sins compound fast: Microchip’s own app notes (AC439, AN4153) spell out decoupling, SerDes layout, and power sequencing rules. Ignore them and you get excessive jitter on 12.7 Gbps lanes or flash programming failures in production.
What Is a Microchip FPGA and How Did the Name Change?
A Microchip FPGA is a field-programmable gate array manufactured by Microchip Technology Inc. (NASDAQ: MCHP) using flash-based configuration cells instead of the SRAM cells found in AMD/Xilinx and Intel/Altera devices. The technology traces back to Actel Corporation, which pioneered anti-fuse and later flash-based FPGA architectures in the 1990s. Microsemi acquired Actel in 2010, inheriting the ProASIC, IGLOO, Fusion, and Axcelerator product lines. In 2018, Microchip completed its acquisition of Microsemi, bringing PolarFire, SmartFusion 2, IGLOO 2, RTG4, and the full radiation-tolerant lineup under the Microchip brand.
For procurement, the practical impact is this: you may find the exact same IC listed as “Actel A3P250-FGG256,” “Microsemi A3P250-FGG256,” or “Microchip A3P250-FGG256” depending on which distributor catalog you search. They are the same silicon. Microchip’s direct ordering portal is MicrochipDirect, and authorized distributors like Mouser, Digi-Key, Avnet, and Arrow carry the full range.
The flash-based architecture has two engineering consequences that go beyond branding. First, the configuration is non-volatile: power-on to user mode takes under 1 ms, with no external configuration PROM needed. SRAM-based FPGAs require a separate SPI flash or JTAG load on every boot, which adds BOM cost, board area, and a potential failure point. Second, flash cells are inherently resistant to single-event upsets (SEUs) from cosmic radiation. This is why Microchip dominates the radiation-tolerant FPGA market—the underlying technology was built for it.
Complete Microchip FPGA Series and Part-Number List
The table below covers every Microchip FPGA family currently available for new designs or still shipping for active programs. Logic element (LE) counts and package data are sourced from the latest Microchip datasheets. If you need pricing or lead times on any of these, request a quote and reference the part number directly.
| FPGA Family | Logic Elements | Transceivers | Max User I/O | On-Chip RAM | Process Node | Status |
| PolarFire (MPF) | 48K–481K | Up to 16x 12.7G | 284–512 | Up to 33 Mb | 28 nm | Active |
| PolarFire SoC (MPFS) | 25K–460K | Up to 16x 12.7G | 284–512 | Up to 33 Mb | 28 nm | Active |
| PolarFire Core (MPF-C) | 48K–481K | None | Up to 512 | Up to 33 Mb | 28 nm | Active |
| SmartFusion 2 (M2S) | 6K–150K | Up to 2x 5G | Up to 374 | Up to 5.4 Mb | 65 nm | Active |
| IGLOO 2 (M2GL) | 6K–56.5K | Up to 2x 5G | Up to 374 | Up to 5.4 Mb | 65 nm | Active |
| ProASIC 3 / 3E (A3P/A3PE) | 0.6K–25K | None | Up to 285 | Up to 504 Kb | 130 nm | Mature |
| IGLOO / IGLOO nano | 0.25K–25K | None | Up to 285 | Up to 504 Kb | 130 nm | Mature |
| Fusion (AFS) | 1.5K–25K | None | Up to 292 | Up to 504 Kb | 130 nm | Mature |
| RT PolarFire (RTMPF) | 100K–300K | Up to 12x 12.7G | Up to 284 | Up to 21 Mb | 28 nm | Active |
| RTG4 (RT4G) | 150K | Up to 24x 3.125G | Up to 462 | Up to 5.4 Mb | 65 nm | Active |
| RTAX-S/SL | 0.25K–4M gates | None | Up to 840 | Up to 630 Kb | 150 nm | Mature |
Note: “Mature” means the family is still shipping and supported but is not recommended for new designs. Microchip has not issued last-time-buy notices for these families as of mid-2025. Always confirm current lifecycle status before committing a new design.
PolarFire and PolarFire SoC — The Current Flagship
PolarFire is Microchip’s 28 nm mid-range FPGA family and the device most new designs should evaluate first. The core pitch: 48K to 481K LEs, 12.7 Gbps SerDes (up to 16 lanes), and 50% lower total power than equivalent SRAM-based parts. PolarFire SoC adds a deterministic, coherent RISC-V CPU cluster (5-core, based on SiFive U54-MC) running Linux, making it the industry’s first RISC-V SoC FPGA. For designs that do not need high-speed serial transceivers, the PolarFire Core sub-family strips the SerDes out and drops the price accordingly.
Here is a non-obvious engineering detail that trips up first-time PolarFire designers: the SERDES_VDD pins are shorted to VDD internally on certain device-package combinations (documented in AN4153 and the PolarFire Board Design User Guide, UG0726). If you route separate regulators for SERDES_VDD and core VDD on those parts, you create a ground loop through the die. Use one regulator for both rails and confirm your specific device-package in the datasheet before finalizing your schematic.
SmartFusion 2 and IGLOO 2 — Proven 65 nm Workhorses
SmartFusion 2 pairs IGLOO 2 FPGA fabric with a hard ARM Cortex-M3 processor, crypto accelerator, and an extensive peripheral set (CAN, I2C, SPI, UART, USB). IGLOO 2 provides the same flash-based FPGA fabric without the processor subsystem. Both are built on 65 nm flash technology, offering 6K to 150K LEs.
These families remain a strong choice for industrial control, PCB fabrication-friendly BGA and QFP packages, and designs where the IPC Class 2 reliability envelope (per IPC-6012) is sufficient. They are also popular in medical devices under IEC 62304, because the Cortex-M3 hard processor eliminates the soft-core timing verification burden.
RT PolarFire, RTG4, and RTAX — Radiation-Tolerant Families
Microchip owns the deepest radiation-tolerant FPGA portfolio in the industry. RT PolarFire (28 nm) targets LEO and GEO missions needing 12.7 Gbps serial links. RTG4 (65 nm) is already flying on multiple programs with total ionizing dose (TID) tolerance up to 100 krad(Si). RTAX devices, originally from Actel, remain qualified to MIL-STD-883 and are still specified into long-lifecycle defense programs. If your program requires ITAR-controlled or QML-qualified parts, these families are where you start.
How to Choose the Right Microchip FPGA for Your Application
Picking between PolarFire, SmartFusion 2, IGLOO 2, and the rad-tolerant families comes down to five questions. Answer them in order and you narrow the field fast:
1. Do you need radiation tolerance? If yes, you are limited to RT PolarFire, RTG4, RTAX, or RT ProASIC 3. The rest of this guide does not apply—rad-hard procurement is a different workflow involving QML screening and lot traceability.
2. How many logic elements does your design consume? Under 60K LEs, IGLOO 2 or SmartFusion 2 cover you at lower cost per LE. Above 60K, PolarFire is the only active Microchip family with headroom up to 481K LEs.
3. Do you need high-speed serial transceivers? If your design requires PCIe Gen2, Gigabit Ethernet over SerDes, or 10G links, PolarFire is the only current-generation Microchip FPGA with 12.7 Gbps transceivers. SmartFusion 2 and IGLOO 2 max out at 5 Gbps on select packages. If you do not need SerDes at all, PolarFire Core saves cost.
4. Do you need an on-chip processor? SmartFusion 2 gives you a hard Cortex-M3 with crypto and peripherals—ideal for control planes. PolarFire SoC gives you a 5-core RISC-V running Linux—suited for edge compute. If you only need FPGA fabric, IGLOO 2 or PolarFire (non-SoC) keep the die smaller and cheaper.
5. What is your power budget? All Microchip FPGAs beat SRAM-based competitors on static power because flash cells don’t leak the way SRAM does. But within the Microchip lineup, IGLOO 2 pulls as low as 5 µW in Flash*Freeze mode. PolarFire static power is higher in absolute terms (still under half of an equivalent Artix-7), but you gain 8× the logic density.
Where to Buy Microchip FPGAs — Authorized and Specialist Channels
Procurement of Microchip FPGAs follows three channels, each with trade-offs:
MicrochipDirect and Authorized Distribution
MicrochipDirect is Microchip’s own e-commerce portal, offering factory pricing, programming services, and the broadest catalog. Mouser, Digi-Key, Avnet, and Arrow are the primary authorized distributors carrying Microchip FPGAs globally. Lead times on mainstream PolarFire parts have stabilized to 12–16 weeks as of early 2025, down from 52+ weeks at the peak of the 2021–2023 allocation crisis. For mil-aero RT parts, expect 20–30 weeks with QPL documentation.
Specialist Component Distributors
FPGA.IO operates as a specialist electronic component supplier focused on FPGAs and the boards they sit on. The advantage of sourcing through a company that also handles PCB assembly is that your FPGA, passive BOM, PCB stackup, and assembly process are reviewed together. A distributor that only sells ICs has no visibility into whether the BGA land pattern on your board matches the device-package combination you ordered. That mismatch is one of the most common causes of BGA solder defects we see in incoming designs.
Independent Brokers — When and Why
Independent brokers fill gaps when authorized channels show stock-outs or prohibitive lead times. The risk is counterfeit or remarked parts. For FPGAs, counterfeits are especially dangerous because a relabeled IGLOO (commercial temp) passing as an IGLOO 2 (industrial or military temp) will work on the bench and fail in the field at 85°C. If you buy through a broker, demand full lot traceability, original manufacturer packaging, and consider third-party testing per SAE AS6171.
Microchip FPGA PCB Design and Assembly Essentials
Getting the silicon right is only half the job. Microchip FPGAs ship in FCBGA, CQFP, CSP, and QFP packages. Each imposes specific PCB fabrication and assembly requirements. Here is what matters most.
Stack-Up, Impedance, and Decoupling
PolarFire FPGAs in FCBGA-484 or FCBGA-784 packages typically require an 8-layer or 10-layer controlled-impedance stackup. Microchip’s Board Design User Guide (UG0726) specifies 50Ω single-ended and 100Ω differential impedance targets for SerDes lanes. For the SerDes PLL power supply (SERDES_x_VDDAPLL), the layout guide calls for a dedicated LC filter with the bypass capacitor placed within 5 mm of the BGA ball—not just “close to the IC.” At 12.7 Gbps, every millimeter of trace between the decoupling cap via and the ball pad adds inductance that degrades your jitter margin.
The target impedance for the core VDD plane depends on your specific design’s switching current, but Microchip’s own simulation guidance recommends calculating it per board—not blindly copying the reference design’s cap count. Complex designs with high toggle rates need 30–60 decoupling capacitors (a mix of 100 nF MLCC, 1 µF MLCC, and 10–47 µF tantalum or MLCC bulk caps). Use X7R or X5R dielectric for values from 1 nF to 100 µF—this is straight from AN4153. Y5V capacitors drift enough with temperature and bias to become ineffective at the frequencies that matter.
BGA Assembly and Reflow Considerations
Microchip’s CSP and BGA packages follow standard J-STD-020 moisture sensitivity levels. Most PolarFire devices are MSL-3, meaning they need to be reflowed within the floor-life window or rebaked before assembly. For 0.4 mm and 0.5 mm pitch CSP packages, Microchip’s own app note (AC243) recommends stainless steel stencils 0.10–0.20 mm thick, laser-cut and electropolished, with a stencil aspect ratio never exceeding 1.5 and an area ratio above 0.66. Hit those numbers and you get consistent paste volume. Miss them and you’ll find opens or shorts during AOI that trace back to stencil aperture undersizing.
The reflow profile for SAC305 solder on a PolarFire FCBGA should hit a peak reflow temperature of 245°C ± 5°C with a time above liquidus (TAL) of 60–90 seconds. Critically, ramp rates above 3°C/sec during the preheat-to-soak transition increase the risk of solder ball cracking on large FCBGA packages because the thermal gradient across the package body exceeds the BGA substrate’s stress tolerance. Keep your preheat ramp at 1.5–2.5°C/sec. Post-reflow, X-ray inspection per IPC-A-610 Class 2 or Class 3 is mandatory for any BGA with pitch below 0.8 mm to catch head-in-pillow defects that AOI cannot see.
Microchip FPGA vs AMD Xilinx vs Lattice — When Flash-Based Wins
Engineers evaluating a Microchip FPGA against AMD’s Artix/Kintex or Lattice’s Certus/Nexus need to weigh four factors. This table gives you the honest comparison at the mid-range sweet spot (roughly 100K–300K LEs).
| Parameter | Microchip PolarFire | AMD Artix-7 / Artix UltraScale+ | Lattice Certus-NX / Avant |
| Configuration | Non-volatile flash (instant-on <1 ms) | SRAM (needs external flash, ~100–500 ms boot) | Non-volatile flash (instant-on) |
| Static Power (typical) | ~50–120 mW at 100K LE | ~150–350 mW at 100K LE | ~30–80 mW (lower density) |
| Max SerDes Speed | 12.7 Gbps | 16.3 Gbps (UltraScale+) | 10 Gbps (Avant only) |
| SEU Immunity | Inherent (flash cells) | Requires scrubbing IP | Inherent (flash cells) |
| Max Logic Density | 481K LE | 900K+ LE (UltraScale+) | 200K LE (Avant) |
| On-Chip Processor | RISC-V 5-core (SoC variant) | MicroBlaze soft core | RISC-V soft core |
| Rad-Hard Variants | RT PolarFire, RTG4, RTAX | XQRKU060 (limited) | None |
| Toolchain | Libero SoC (free license) | Vivado (free for Artix-7) | Lattice Radiant |
| Typical Lead Time | 12–16 weeks | 8–14 weeks | 8–12 weeks |
The honest trade-off: if you need maximum logic density above 500K LEs, high-bandwidth memory (HBM), or PCIe Gen4/Gen5, AMD’s Versal and UltraScale+ families are the only game in town. Microchip’s sweet spot is the 48K–481K LE mid-range where power, security, and instant-on matter more than raw gate count. Lattice competes at the low end (under 200K LE) with excellent power efficiency but has no SerDes above 10 Gbps and no hard processor.
Here is a counterintuitive point most comparison guides miss: Microchip’s flash-based FPGAs eliminate the BOM cost of the external configuration SPI flash, its associated passive components, and the board area those parts consume. On a space-constrained design—a wearable medical device, for example—dropping that flash IC and its four 100 nF decouplers frees 30–50 mm² of board space. That is real estate you can use for the battery or an additional sensor. In volume production at 10K+ units, the BOM savings on configuration flash and its passives can offset any unit-price premium on the FPGA itself.
Common Mistakes When Specifying and Assembling Microchip FPGAs
This checklist comes from real production issues seen across hundreds of FPGA-based boards:
1. Mixing up device-package SERDES_VDD routing. On certain SmartFusion 2 and IGLOO 2 device-package combinations, SERDES_VDD is shorted to core VDD inside the package substrate. Routing a separate regulator creates a low-impedance loop through the die. Check the datasheet’s pin description table for your exact device-package before finalizing power distribution.
2. Using Y5V capacitors for decoupling. Y5V ceramic capacitors lose up to 80% of their rated capacitance at operating voltage and temperature. A “100 nF” Y5V cap at 3.3 V and 85°C may deliver only 20 nF. For FPGA decoupling, X7R or X5R dielectric is the minimum. This is not opinion—it is in AN4153 and every Microchip board design guide.
3. Ignoring the stencil aspect ratio for fine-pitch CSP. For 0.4 mm pitch BGA packages, a 0.15 mm thick stencil with a standard round aperture fails the 0.66 area ratio rule. You get inconsistent paste deposits, leading to opens. Either reduce stencil thickness to 0.10–0.12 mm or use a step stencil with a localized reduction over the FPGA footprint.
4. Skipping X-ray inspection on sub-0.8 mm pitch BGAs. AOI cannot detect head-in-pillow, solder bridging beneath the package body, or voiding above 25%. For IPC Class 3 assemblies (IPC-A-610), X-ray is not optional on these packages.
5. Ordering the wrong temperature grade. Microchip FPGA part numbers encode temperature grade in the suffix: “I” = Industrial (−40°C to +100°C), “E” = Extended (−40°C to +125°C), “TL” or no suffix = Commercial (0°C to +70°C). A procurement spec that says “industrial” but orders a commercial-suffix part number will pass incoming inspection and fail thermal testing. Verify the last characters of the part number match your operating environment before PO release.
6. Neglecting flash programming in production. Unlike SRAM FPGAs where you program the external flash and the FPGA auto-loads, Microchip FPGAs require programming of the on-chip flash via JTAG or SPI using FlashPro 5/6 or a ChipPro programmer. Build this into your production test flow from day one. Trying to retrofit flash programming into an assembly line designed around external flash loading costs time and fixture redesign.
Real-World Case: A Defense Sensor Board Re-Spin Avoided
A defense contractor designing a sensor processing board around an RT PolarFire FPGA initially spec’d the power supply with a single regulator for all VDD rails, with ferrite beads splitting the SerDes PLL supply. During DFM review, the PCB layout team identified that the ferrite bead’s impedance characteristic would resonate with the 1 µF PLL decoupling capacitor at approximately 40 MHz, injecting noise directly into the SerDes PLL. They switched to a dedicated ultra-low-noise LDO for SERDES_x_VDDAPLL with a properly damped RC filter, following the topology in Microchip’s AC439 reference layout. The fix cost $0.80 per board in additional LDO and passives. A re-spin of the 12-layer, ENIG-finished, controlled impedance board would have cost upward of $15,000 in NRE and 6 weeks of schedule delay.
Frequently Asked Questions About Microchip FPGAs
Is Microsemi the same as Microchip for FPGA products?
Yes. Microchip Technology acquired Microsemi Corporation in May 2018. All Microsemi FPGA products—PolarFire, SmartFusion 2, IGLOO 2, RTG4, RTAX, and legacy Actel families—are now manufactured, sold, and supported by Microchip. Old Microsemi part numbers remain valid in distributor catalogs.
What is the cheapest Microchip FPGA for prototyping?
The IGLOO 2 M2GL005-TQG144 offers 5.7K LEs in a 144-pin QFP package and is available from authorized distributors for under $10 in single quantities. For mid-range prototyping, the PolarFire Evaluation Kit (MPF300-EVAL-KIT) gives you 300K LEs with PCIe and Ethernet interfaces on a ready-to-use board for around $200.
What design software do I need for Microchip FPGAs?
Microchip’s Libero SoC Design Suite is the primary IDE for all current FPGA families. A free Silver license covers PolarFire devices up to 300K LEs. SmartHLS is Microchip’s high-level synthesis tool for C/C++ to RTL compilation, targeting PolarFire and PolarFire SoC devices.
Can Microchip FPGAs replace AMD Xilinx parts in existing designs?
Not as a drop-in replacement. The logic fabric architecture, I/O standards, and pin assignments differ, so you would need to re-synthesize and re-route the design using Libero SoC. However, for new designs where you are evaluating vendors, Microchip’s PolarFire is pin-function-compatible within its own family across density options, which simplifies scale-up within the Microchip ecosystem.
How long are lead times for Microchip FPGAs?
As of mid-2025, standard PolarFire and IGLOO 2 commercial-grade parts show 12–16 week lead times through authorized distributors. Military and radiation-tolerant parts typically run 20–30 weeks. FPGA.IO maintains buffer stock on high-runner part numbers—contact us for current availability on your specific device.
Are Microchip FPGAs suitable for automotive applications?
PolarFire FPGAs are qualified to AEC-Q100 Grade 2 (−40°C to +105°C) for specific device-package combinations. Check Microchip’s automotive-qualified product list for your target part number. The flash-based architecture’s inherent SEU immunity is an advantage in automotive safety systems where radiation-induced bit flips in SRAM FPGAs would require mitigation logic.
What package types do Microchip FPGAs come in?
PolarFire ships in FCBGA (0.8 mm and 1.0 mm pitch) and CSP packages. SmartFusion 2 and IGLOO 2 add FBGA and QFP options (208-pin CQFP, 256-pin CQFP). Legacy ProASIC 3 devices are available in CQFP, FBGA, and QFP. For production volumes, BGA variants offer better electrical performance due to shorter bond wire lengths and lower parasitic inductance.
Get a Microchip FPGA Quote with DFM Review from FPGA.IO
Picking the right Microchip FPGA is step one. Getting it assembled correctly on a board that meets your impedance, power integrity, and reliability requirements is everything after that. FPGA.IO supplies Microchip FPGAs across the full portfolio—PolarFire, PolarFire SoC, SmartFusion 2, IGLOO 2, and radiation-tolerant RT families—and handles PCB fabrication and SMT assembly under one roof, with DFM review included on every order.
Send your Gerber files, BOM, and target Microchip FPGA part number to get a combined component + board + assembly quote—typically returned within 24 hours.