Post: Skinny DIP Package: 0.3-Inch Row Spacing, Explained

Skinny DIP Package: 0.3-Inch Row Spacing, Explained

A skinny DIP package is an ordinary dual in-line package whose two lead rows sit 0.300 in (7.62 mm) apart instead of the wide-body 0.600 in (15.24 mm). Lead pitch stays at 0.100 in. The term is informal shop language, not a JEDEC designation, but it maps cleanly onto one: JEDEC MS-001. Getting that mapping right is the difference between a part that drops in and one that does not.

Key takeaways

  • Skinny changes row spacing only. Pitch stays 2.54 mm.
  • Skinny is not shrink. Skinny is MS-001 (0.300 in rows, 0.100 in pitch); shrink is MS-019 (0.300 in rows, 0.070 in pitch). Several widely read pages conflate them.
  • Microchip’s SPDIP means Skinny Plastic DIP, while most other vendors read SP as shrink. Check the body width, not the acronym.
  • Registered MS-001 variations in common use run 8 to 24 leads; 28-lead 0.3-inch parts ship against manufacturer drawings.
  • Halving row spacing halves board width but removes roughly 7.6 mm of inter-row routing channel.

[IMAGE 1: side-by-side end views of a 0.300 in and a 0.600 in DIP on the same board, with row spacing and pad diameters called out | alt: “Skinny DIP package 0.3-inch row spacing compared with a 0.6-inch wide-body DIP”]

What a skinny DIP package is

A skinny DIP package is a through-hole dual in-line package with 0.100 in (2.54 mm) lead pitch and 0.300 in (7.62 mm) between the two lead rows. The narrow rows halve the board width a wide-body DIP needs. Everything else, from pitch to insertion to soldering, is unchanged.

The name is descriptive, not registered. Datasheets call the same thing narrow body, 300 mil body, DIP28N, or SPDIP. What all of them share is the row spacing measured at the lead tips.

Skinny is not shrink: MS-001 against MS-019

This is where the ranking pages go wrong. Several state that skinny DIP and shrink DIP are the same variant, or that skinny DIP is abbreviated SDIP. The JEDEC outline index separates them by pitch.

JEDEC outlineFamilyLead pitchRow spacingCommon name
MS-001 (rev D, June 1993)Plastic DIP0.100 in (2.54 mm)0.300 in (7.62 mm)Skinny / narrow / 300 mil DIP
MS-010 (rev C, Nov 1993)Plastic DIP0.100 in0.400 in (10.16 mm)400 mil DIP, uncommon
MS-011 (rev B, June 1988)Plastic DIP0.100 in0.600 in (15.24 mm)Wide body DIP
MS-015Ceramic DIP0.100 in0.300–0.900 inCERDIP family
MS-019Shrink plastic DIP0.070 in (1.778 mm)0.300 inShrink DIP, SDIP
MS-020Shrink plastic DIP0.070 in0.600 inShrink DIP
MS-021Shrink plastic DIP0.070 in0.750 inShrink DIP

Read the table by column. MS-001 and MS-019 share a row spacing and differ in pitch. A skinny DIP fits a 0.100 in grid; a shrink DIP does not. Drop a shrink part onto a skinny footprint and every hole past the first is wrong.

The acronym adds a second trap. Microchip’s packaging specification lists “24-Lead Skinny Plastic Dual In-Line (PF) – 300 mil Body [SPDIP]” and, in the same document, “64-Lead Shrink Plastic Dual In-Line (SP) 750 mil Body.” One vendor, one two-letter code, two meanings. Verify by body width and pitch every time.

[INTERNAL LINK: dual in-line package pinouts and footprints -> DIP package guide]

Which lead counts exist at 0.3 inch

Allegro’s package designator table (PUB26013 Rev. 9) maps its through-hole DIP outlines to JEDEC variations, which gives a usable index of what was registered at 300 mil row spacing.

MS-001 variationLeadsNote
BA8Half-lead end pins (mini DIP)
AA14 
BB16Semi-tab, internally fused leads
AC18 
AD20 
AF24Largest common 300 mil variation

Above 24 leads the standard family moves to 0.600 in (MS-011AB covers 28). Parts such as the 28-lead ATmega328P in 0.300 in body therefore ship against manufacturer outlines rather than a widely used MS-001 variation. If a 28-pin narrow part is in your BOM, pull the vendor drawing; do not assume a generic library footprint is right.

The geometry a datasheet actually gives you

Take a real MS-001-compliant drawing: the Analog Devices N-8, 8-lead PDIP narrow body, drawing 070606-A.

  • Lead pitch 0.100 in (2.54 mm) BSC
  • Row spacing at lead tips 0.300 in (7.62 mm)
  • Row spacing at the shoulders 0.310 to 0.325 in (7.87 to 8.26 mm)
  • Body width 0.240 to 0.280 in (6.10 to 7.11 mm)
  • Seated height 0.210 in (5.33 mm) max, standoff 0.015 in (0.38 mm) min
  • Lead cross-section 0.008 to 0.014 in thick by 0.014 to 0.022 in wide

The shoulder figure is the one people miss. Leads leave the body splayed wider than the hole pattern, so insertion compresses both rows inward by up to 0.025 in total. Automatic inserters do this with forming jaws. By hand, that force lands on the lead-to-body joint, and repeated straightening is what eventually cracks a lead root.

For the hole itself, the maximum lead cross-section of 0.36 mm by 0.56 mm gives a diagonal of 0.67 mm. At IPC-7251 Level B that puts the finished hole at 0.87 mm, call it a 0.9 mm drill with a 1.5 mm pad.

[INTERNAL LINK: IPC-7251 through-hole land patterns -> through-hole footprint design]

What 0.3-inch row spacing costs in routing

Board width is the obvious win. Compare a 28-lead part on both spacings, using the 1.5 mm pad from above:

Metric0.300 in rows0.600 in rows
Outer footprint width including pads9.1 mm16.7 mm
Footprint area, 28 leads≈ 315 mm²≈ 577 mm²
Clear channel between pad edges6.1 mm13.7 mm
0.2 mm tracks fitting the inner channel≈ 15≈ 34

The area saving is real: about 45 % on a 28-lead outline. The cost is the inner channel, which drops by 7.6 mm and takes roughly 19 routing tracks with it.

That matters on two-layer boards, where the region under a DIP is the natural place to run a bus. On a four-layer board with a dedicated signal layer, it rarely does. Escape between adjacent pads is unchanged either way: 2.54 mm pitch minus a 1.5 mm pad leaves 1.04 mm, which accepts two 0.2 mm tracks at 0.2 mm clearance.

Thermal capacity shrinks with the body. A 300 mil outline carries a smaller die paddle and less lead-frame copper than the 600 mil version, so the same die dissipates less in the narrow body. Where a part is offered in both, compare the junction-to-ambient figure for each package rather than assuming the die sets the limit.

[IMAGE 2: plan view of both footprints with the inner routing channel shaded and track counts annotated | alt: “Routing channel between skinny DIP package pad rows compared with a wide-body DIP”]

Sockets, insertion, and the errors that cause rework

Wrong socket width. A 0.300 in part will not seat in a 0.600 in socket without splaying the leads permanently, and the reverse is impossible. Sockets are sold by row spacing; the pin count alone does not identify one. A DIP-28 socket exists in both widths.

Library footprint by pin count. Most EDA libraries offer DIP-28 in both widths under similar names. The 28-pin case is the one that bites, because the wide version is the historical default and the narrow version is what modern microcontrollers use.

Assuming the acronym. SPDIP, SDIP, and “narrow DIP” resolve differently by vendor. The body width in the mechanical drawing is the only reliable identifier.

Ignoring the standoff. MS-001 sets a 0.015 in (0.38 mm) minimum standoff. Seating a body flat against the board defeats it and traps flux under the package, which matters if the assembly is cleaned.

Pin 1 orientation. DIP bodies carry a notch, a dot, or both. On a skinny body the notch is proportionally larger relative to width, which makes it easy to read, and easy to mistake for a keying feature it is not.

Lifecycle: obsolete outline, live parts

The standards status and the parts status have diverged, and both matter for sourcing.

Allegro’s current designator table marks every one of its through-hole DIP outlines, the 300 mil MS-001 variations, the 400 mil MS-010, and the 600 mil MS-011, as OBSOLETE. That reflects a sensor vendor exiting through-hole, not the death of the format.

Meanwhile the ATMEGA328P-PU, a 28-lead 0.300 in DIP, is listed by DigiKey as Active with more than 53,000 units in stock at $2.89 in single quantity and a 6-week manufacturer standard lead time. Skinny DIP survives where breadboards, sockets, and field-replaceable firmware do.

Plan accordingly: if a design depends on a specific 300 mil part, verify its lifecycle individually rather than by family, and check whether a wide-body second source exists, because if it does, it will not fit your board.

[INTERNAL LINK: component obsolescence and second-source qualification -> lifecycle management]

Skinny DIP FAQ

What does skinny DIP mean?

It means a dual in-line package with 0.300 in (7.62 mm) between the lead rows instead of the 0.600 in wide body, at the normal 0.100 in lead pitch. The term is informal workshop usage; datasheets more often say narrow body, 300 mil body, or SPDIP.

What is the difference between skinny DIP and shrink DIP?

Row spacing versus pitch. Skinny DIP is JEDEC MS-001: 0.300 in rows, 0.100 in pitch. Shrink DIP is MS-019 to MS-021: 0.070 in (1.778 mm) pitch at 0.300, 0.600, or 0.750 in rows. They are not interchangeable, and no footprint serves both.

What is the row spacing of a skinny DIP?

0.300 in, which is 7.62 mm, measured between the two lead rows at the tips. The shoulders sit wider, since the Analog Devices N-8 drawing gives 0.310 to 0.325 in, so the leads compress inward as the part enters the board.

Is a 28-pin DIP 0.3 or 0.6 inches wide?

Both exist. Memory and logic parts of that vintage are usually 0.600 in; modern microcontrollers such as the ATmega328P use 0.300 in. Pin count does not determine width, so read the mechanical drawing before selecting a footprint or a socket.

What does SPDIP stand for?

It depends on the vendor. Microchip uses SPDIP for Skinny Plastic Dual In-Line at 300 mil body. Elsewhere the same letters are read as Shrink Plastic DIP with 0.070 in pitch. Confirm from the body width and pitch in the drawing rather than the abbreviation.

Can I put a narrow DIP in a wide DIP socket?

Not properly. The leads would have to be splayed by 0.300 in in total, which deforms them past recovery and leaves poor contact. Use a socket matched to the row spacing, or an adapter designed for the conversion.

What to do next

Identify the part by its mechanical drawing, not its abbreviation. Row spacing and lead pitch together fix the footprint; the marketing name does not.

If the design is a two-layer board with a bus running under the IC, price the lost routing channel before choosing 0.300 in. Roughly 15 tracks fit where 34 fit on a wide body, and recovering them later means a respin.

If the part is 28 leads at 0.300 in, pull the manufacturer’s outline and build the footprint from it. That lead count sits outside the commonly registered MS-001 variations, and a generic library part is as likely to be wide-body as narrow.

[IMAGE 3: mechanical drawing callouts showing tip row spacing, shoulder row spacing, standoff, and seated height | alt: “Skinny DIP package dimensions including 0.3-inch row spacing and lead standoff”]

Primary sources

  • Analog Devices, 8-Lead PDIP Narrow Body (N-8), drawing 070606-A, compliant to JEDEC MS-001 — https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/pdipn/n_8.pdf
  • Allegro MicroSystems, Package Designations, PUB26013 Rev. 9 — https://www.allegromicro.com/-/media/files/packaging/package-designators.pdf
  • JEDEC JEP95 master index of registered outlines (MS-001, MS-010, MS-011, MS-015, MS-019 to MS-021) — https://www.jedec.org/sites/default/files/Master.pdf
  • JEDEC MS-001-D, Dual-In-Line Plastic Family .300 inch Row Spacing — https://www.jedec.org/standards-documents/docs/ms-001-d
  • Microchip Packaging Specification DS00049 series (SPDIP and shrink DIP listings) — https://ww1.microchip.com/downloads/en/PackagingSpec/00049BG.pdf
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