The TSSOP-44 package runs on 0.635 mm pitch, not 0.65 mm, with a 14.0 mm by 6.1 mm body, a lead span of 7.9 mm to 8.3 mm and a maximum height of 1.2 mm. One more thing separates it from every other TSSOP: the exposed thermal pad sits on the top of the package, so the board gets no thermal land and the heat leaves through a heatsink clamped to the lid.

Key takeaways

• TSSOP-44 dimensions per TI drawing DDV0044D: body 13.9 mm to 14.1 mm by 6.0 mm to 6.2 mm, lead span 7.9 mm to 8.3 mm, pitch 0.635 mm, height 1.2 mm max.
• The pitch is 0.635 mm, which is 25 mil. Draw it at 0.65 mm and the end leads sit 0.16 mm off their lands, more than the side clearance the land pattern allows.
• The thermal pad faces up. TI’s drawing note reads that it is designed to be attached to an external heatsink, so the land pattern is signal-only: 44 lands of 1.45 mm by 0.4 mm and nothing in the middle.
• The heatsink is a specified part, not an afterthought: its contact face must stand 1.0 mm plus or minus 0.01 mm above the surfaces that touch the PCB, with about 1 mil of thermal compound.
• One footprint carries four power levels: TAS5612LA, TAS5614LA, TAS5624A and TAS5634 are pin-compatible in DDV-44, spanning 32.5 V to 58 V rails.

[IMAGE 1: dimensioned top, side and end view of a 44-lead TSSOP with pitch, lead span, height and the top-side pad called out | alt: “TSSOP-44 package dimensions showing 0.635 mm pitch and a top-side thermal pad”]

The pitch is 0.635 mm, and that matters

TI dimensions the 44-lead body as 42 spaces at 0.635 mm, giving a 13.335 mm lead row on a 14 mm body. That number is an imperial 25 mil carried into a metric family, and it is the single most common mistake in a TSSOP-44 layout.

Work the error out. Each space drawn at 0.65 mm adds 0.015 mm, so across 21 spaces per side the last lead lands 0.158 mm from its land centre. The land is 0.4 mm wide and the lead can be 0.27 mm wide, which leaves 0.065 mm of clearance per side. The end leads are off the copper before you reach pin 22.

The registration picture is loose as usual. JEDEC Publication 95, in its index by device type, lists MO-153 lead counts of 8, 14, 16, 20, 24, 28, 36, 40, 48, 52, 56, 60, 64 and 68, with no entry for 44. TI still cites MO-153 as a reference on the DDV0044D drawing. Treat the family reference as a hint and the drawing as the specification.

TSSOP-44 dimensions

Table 1 lists the controlled dimensions from TI drawing DDV0044D, revision 4218830/A dated August 2016.

Table 1. TSSOP-44 mechanical data, dimensions in mm

Parameter	Value	Note
Leads	44, 22 per side	plus the exposed pad terminal
Lead pitch	0.635	42 spaces, 13.335 mm lead row
Body length	13.9 to 14.1	excludes mold flash up to 0.15 mm per side
Body width	6.0 to 6.2
Lead span	7.9 to 8.3 typ	across the gull wings
Height	1.0 to 1.2	1.2 mm maximum
Standoff	0.05 to 0.15
Lead width	0.17 to 0.27	against a 0.4 mm land
Foot length	0.50 to 0.75	gage plane at 0.25 mm
Lead angle	0 to 8 degrees
Exposed pad	6.72 to 7.30 by 3.85 to 4.43	on the top face, for an external heatsink
JEDEC reference	MO-153	44 leads are not a registered variation in the JEDEC index

The pad is large: up to 7.30 mm by 4.43 mm, which is 32 mm² of metal against a 14 mm by 6.1 mm body. That is the entire cooling interface, and it is on the wrong side for anything a PCB can do about it.

Why the TSSOP-44 footprint has no thermal land

Note 5 on the DDV0044D drawing states that the exposed thermal pad is designed to be attached to an external heatsink. TI’s own naming reinforces it: the TAS5142 datasheet describes both the DKD and DDV options as containing a heat slug located on the top side of the device for thermal coupling to a heatsink.

So the land pattern is plain. TI shows 44 lands of 1.45 mm by 0.4 mm on 0.635 mm pitch, rows dimensioned at 7.5 mm, non solder mask defined, with 0.05 mm of mask clearance around each land. The stencil example uses the same 1.45 mm by 0.4 mm apertures on a 0.125 mm foil. There is no thermal land, no via array and no aperture table, because there is nothing underneath to solder.

Engineers arriving from HTSSOP-32 or HTSSOP-38 tend to add a copper island and a via farm out of habit. Under a DDV-44 that copper does nothing thermally, and it eats routing channels directly beneath the highest-current pins on the part.

Board area works out at roughly 9.0 mm along the rows, from 21 spaces at 0.635 mm plus one land width, by 8.95 mm across, from the 7.5 mm row dimension plus one land length. That is about 125 mm² of land pattern, before the heatsink footprint, which is usually the larger constraint.

[IMAGE 2: land pattern with 44 lands and no centre copper, next to a cross-section showing the heatsink clamped to the top pad | alt: “TSSOP-44 footprint with 1.45 mm by 0.4 mm lands on 0.635 mm pitch and no thermal land”]

Thermal numbers and what they assume

The TAS5634 datasheet lists junction-to-ambient at 2.6 °C/W for the 44-pin DDV package, junction-to-case through the top at 0.4 °C/W, junction-to-board at 2.0 °C/W, and junction-to-case through the bottom as not applicable. That last entry is the clue: there is no bottom path to measure.

A 2.6 °C/W junction-to-ambient figure is a system number, not a package number. Compare it with the 83.6 °C/W TI publishes for the plain 38-pin TSSOP in the ADS795x family. No plastic package moves 30 times more heat by itself; the difference is the heatsink and compound the drawing assumes.

Run the budget with the recommended limits rather than the absolute maximum. The TAS5634 recommends a junction temperature ceiling of 125 °C, warns at 125 °C typical and shuts down at 155 °C typical. At 25 °C ambient, 2.6 °C/W and a 125 °C ceiling allow about 38 W of dissipation. Idle losses alone are 8.6 W typical with channels switching, which is a 22 °C rise before any audio plays.

The mechanical spec that produces those numbers is in the layout section, not the thermal table. The heatsink must present its contact area 1.0 mm plus or minus 0.01 mm above the surfaces that rest on the PCB, must be supported at each end of the IC, and must meet the pad through roughly 1 mil of high-conductivity thermal compound. A flat heatsink and a thick smear of paste will not reproduce the datasheet.

TSSOP-44 pinout and the terminal that is not a pin

Numbering follows the usual rule: pin 1 at the index feature, counterclockwise from the top view, 1 to 22 down one side and 23 to 44 back up the other. Function assignment is device-specific, so a generic TSSOP-44 pinout does not exist.

The pad is a circuit node. In the TAS5634 pin table the PowerPAD is listed as ground, to be connected to a grounded heat sink, and the datasheet layout notes require the heatsink to have a good electrical connection to PCB ground near the IC. Leave that path out and the metal on top of your amplifier floats at whatever the switching node couples into it.

Power pins double up rather than widen. The TAS5634 assigns ground to pins 9 to 12, 25, 26, 33, 34, 41 and 42, and pairs outputs across pins 39 and 40 for OUT_A and 27 and 28 for OUT_D. Ten ground pins on a 44-pin package is a hint about the current density you are routing.

Second sources, assembly and sourcing

One footprint serves a family. Table 2 lists the pin-compatible DDV-44 power stages TI names in the TAS5634 datasheet, which lets a board carry three different output ratings without a layout change.

Table 2. Pin-compatible devices sharing the DDV-44 footprint

Device	Description	PVDD nominal	Drain-to-source resistance
TAS5612LA	125 W stereo / 250 W mono power stage	32.5 V	60 mΩ
TAS5614LA	150 W stereo / 300 W mono power stage	36 V	60 mΩ
TAS5624A	200 W stereo / 400 W mono power stage	36 V	40 mΩ
TAS5634	300 W stereo / 600 W mono power stage	58 V	80 mΩ

Packing is conventional. TI’s November 2025 addendum lists TAS5634DDV in 35-piece tubes and TAS5634DDVR at 2000 per large tape and reel, both rated moisture sensitivity Level 3 with a 260 °C peak and a 168 hour floor life. Classification follows IPC/JEDEC J-STD-020 and floor life follows J-STD-033.

The reel is 330 mm on 24 mm tape, with pockets 8.6 mm by 15.6 mm by 1.8 mm deep at 12 mm pitch. Check for a free 24 mm feeder before quoting the line, and remember that the tube option exists for prototype builds where a 2000-piece reel is not sensible.

Budget the mechanical parts as BOM lines. A TSSOP-44 amplifier ships with a machined or extruded heatsink, thermal compound and mounting hardware, and those items usually cost more than the IC. Non-TI parts do appear in 44-lead TSSOP, such as the AverLogic AL440B FIFO listed by distributors as 44-pin TSSOP, but the package is dominated by TI Class-D power stages, so plan second sourcing inside that family rather than across vendors.

Five mistakes that cost a board spin

1. Drawing the land pattern on 0.65 mm pitch. The correct value is 0.635 mm, and the cumulative error puts end leads 0.16 mm off their lands.
2. Adding a bottom thermal land and via array copied from an HTSSOP-32 or HTSSOP-38 design. On DDV-44 the pad is on top, so that copper cools nothing and blocks routing.
3. Omitting the pad terminal from the schematic symbol, which leaves the heatsink ground unnetted and unverified by DRC.
4. Specifying a flat heatsink. TI requires the contact face 1.0 mm plus or minus 0.01 mm proud of the surfaces that touch the board, supported at both ends of the IC.
5. Quoting 2.6 °C/W in a thermal model without the heatsink and compound that number assumes, then discovering the overtemperature warning at 125 °C during audio testing.

TSSOP-44 package FAQ

What are the dimensions of a TSSOP-44 package?

Body length is 13.9 mm to 14.1 mm, body width 6.0 mm to 6.2 mm, lead span 7.9 mm to 8.3 mm and height 1.2 mm maximum, on 0.635 mm pitch, per TI drawing DDV0044D. Lead width runs 0.17 mm to 0.27 mm and foot length 0.50 mm to 0.75 mm. The top-side thermal pad measures up to 7.30 mm by 4.43 mm.

What is the pitch of a TSSOP-44 package?

It is 0.635 mm, equal to 25 mil, not the 0.65 mm used on many lower lead counts. TI dimensions the row as 42 spaces at 0.635 mm for a 13.335 mm span. Adapter and stencil vendors list the same value for their 14 by 6.1 mm TSSOP-44 hardware.

Does the TSSOP-44 have a thermal pad on the bottom?

No. On TI’s DDV-44 outline the exposed pad is on the top face and the drawing states it is designed for an external heatsink. The recommended land pattern contains only the 44 signal lands, so there is no thermal land or via array to draw underneath the part.

How do you cool a TSSOP-44 amplifier?

Clamp a heatsink to the top pad. TI specifies the contact area standing 1.0 mm plus or minus 0.01 mm above the surfaces that meet the PCB, mechanical support at each end of the IC, roughly 1 mil of high-conductivity thermal compound, and a good electrical connection from the heatsink to board ground.

Is TSSOP-44 the same as TSOP-44?

No. TSOP 44 is a separate memory-style package, catalogued by Renesas as PH44 and PHG44, and adapters for it are built on 0.8 mm contact pitch. TSSOP-44 is a 0.635 mm pitch, 14 by 6.1 mm gull-wing package. The names differ by one letter and the footprints are not interchangeable.

What to do next

Open DDV0044D or the drawing for your exact part number and confirm three things before routing: 0.635 mm pitch, a 7.9 mm to 8.3 mm lead span, and which face the pad is on. Then build the land pattern as 44 lands of 1.45 mm by 0.4 mm with rows at 7.5 mm, non solder mask defined, and leave the centre empty.

Treat the heatsink as a schematic-level decision. Specify the 1.0 mm step, the compound thickness and the ground connection at the same time you choose the device, and derate against the recommended 125 °C junction ceiling rather than the 150 °C absolute maximum.

Change package only when the numbers force it. If your dissipation sits under a watt or two and a clip-on heatsink is unwelcome in the mechanical design, a bottom-pad HTSSOP or a QFN is the better answer. If you are moving hundreds of watts of audio through four half-bridges, TSSOP-44 with a top-side slug is doing exactly the job it was designed for.

[IMAGE 3: exploded view of heatsink, thermal compound, TSSOP-44 and PCB showing the 1.0 mm step | alt: “TSSOP-44 heatsink mounting showing the 1.0 mm stepped contact area above the PCB surface”]

Internal links

• [INTERNAL LINK: TSSOP-38 package -> TSSOP-38 dimensions, pinout and footprint]
• [INTERNAL LINK: TSSOP-32 package -> TSSOP-32 dimensions, pinout and footprint]
• [INTERNAL LINK: exposed pad thermal via design -> PowerPAD and thermal land layout guide]
• [INTERNAL LINK: heatsink selection -> attaching heatsinks to top-side thermal pads]
• [INTERNAL LINK: moisture sensitivity level -> MSL floor life, baking and dry pack handling]

External references

• TI package outline DDV0044D: https://www.ti.com/lit/ml/pptd233a/pptd233a.pdf
• TI TAS5634 datasheet, thermal information and heatsink requirements: https://www.ti.com/lit/ds/symlink/tas5634.pdf
• TI TAS5142 datasheet, DKD and DDV package options: https://www.ti.com/lit/ds/symlink/tas5142.pdf
• JEDEC Publication 95 index by device type: https://www.jedec.org/sites/default/files/MOIND_DT.pdf
• TI ADS7950 to ADS7961 datasheet, thermal reference point for a TSSOP without a pad: https://www.ti.com/lit/ds/symlink/ads7953.pdf