The TSSOP-14 package is a 14-lead thin shrink small outline package on 0.65 mm pitch, 1.2 mm maximum height, with a 4.9 to 5.1 mm body and a 6.2 to 6.6 mm lead span. It is the smallest of the standard 14-lead options and the worst of them thermally. Below: verified dimensions, the pin numbering, two manufacturers’ land patterns compared, and the thermal number that catches people out.
Key takeaways
- Body is 4.9 to 5.1 mm long by 4.3 to 4.5 mm wide, 1.2 mm maximum height, 0.65 mm pitch, 6.2 to 6.6 mm lead span, per TI drawing PW0014A rev 4220202/B.
- Pin 1 sits 0.55 mm from the end of the body. Seven leads per side span 3.90 mm inside a 5.0 mm body.
- Pin numbering is inherited from DIP-14. On the same die, SOIC-14, SSOP-14, SOP-14, PDIP-14 and TSSOP-14 all share one pinout.
- It is the worst 14-lead package thermally. TI measures 151.7 °C/W for the TSSOP against 133.6 °C/W for SOIC-14 and 60.7 °C/W for PDIP-14 on the same device.
- TI revised that figure upward from 113 °C/W in June 2021. An old datasheet gives a number roughly a third too optimistic.
- The land pattern saves real area: about 31.8 mm² against roughly 57.1 mm² for the SOIC-14 land, a 44 percent reduction.
What the TSSOP-14 package is
The TSSOP-14 package is a 14-lead plastic surface-mount package with gull-wing leads on the two long sides, 0.65 mm lead pitch and a seated height capped at 1.2 mm. TI designates it PW and references JEDEC registration MO-153. Infineon calls the same outline PG-TSSOP-14-1.
Fourteen leads is the workhorse count for quad gates, hex inverters, quad comparators and quad op amps, which is why this package shows up so often in logic and analog catalogues. The 14-lead TSSOP is the smallest standard leaded option at that count.
Two adjacent packages get confused with it. SSOP-14 shares the 0.65 mm pitch but is 2 mm tall with a 7.4 to 8.2 mm lead span. SOIC-14 uses 1.27 mm pitch on an 8.55 to 8.75 mm body. Neither footprint is interchangeable with the TSSOP-14 package, even though all three carry the same 14 pins in the same order.
[IMAGE 1: dimensioned outline of the 14-lead TSSOP with body, span, pitch and height called out | alt: “TSSOP-14 package dimensions showing 5 mm body, 4.4 mm width, 6.4 mm lead span and 0.65 mm pitch”]
TSSOP-14 package dimensions
All values below are from TI package outline drawing PW0014A, revision 4220202/B, December 2023, in millimetres.
| Symbol | Parameter | Min | Max | Note |
| A | Seated height | — | 1.20 | Defines the thin class |
| A1 | Standoff | 0.05 | 0.15 | |
| — | Body length | 4.90 | 5.10 | Excludes mold flash, 0.15 mm per side |
| — | Body width | 4.30 | 4.50 | Excludes interlead flash, 0.25 mm per side |
| — | Lead span, tip to tip | 6.20 | 6.60 | Typical dimension on the drawing |
| e | Lead pitch | — | 0.65 | 12 spaces across the part |
| — | Lead-row length | — | 3.90 | 6 spaces per side, shown twice |
| b | Lead width | 0.17 | 0.30 | |
| L | Foot length | 0.50 | 0.75 | |
| — | Gage plane offset | — | 0.25 | Foot angle 0° to 8° |
| — | Lead-form corner angle | — | 0° to 12° | Four corners |
Derive the pin 1 position before trusting a library part. Seven leads per side at 0.65 mm pitch span 6 x 0.65 = 3.90 mm, which the drawing shows as a doubled dimension across the two rows. Subtract that from a 5.0 mm nominal body and halve the remainder: pin 1 centre falls 0.55 mm from the body end.
That number is the fastest way to spot a footprint drawn to the wrong lead count. A 16-lead TSSOP on the same 4.9 to 5.1 mm body has a 4.55 mm lead row and only 0.225 mm of body left at each end, so the two parts look similar and their pad rows are 0.65 mm different in length.
Watch the flash allowances. Mold flash may add up to 0.15 mm per side on the length and interlead flash up to 0.25 mm per side across the width, and neither is included in the body dimensions. A part measuring 5.4 mm long across the mold line is still within drawing.
TSSOP-14 pinout
The TSSOP-14 package has no pinout of its own. Pin numbering runs counter-clockwise from the pin 1 index area, and function is set by the die inside. What makes 14 leads predictable is inheritance: the numbering came from DIP-14 and was carried forward unchanged.
TI’s SN74HC14 hex Schmitt inverter, datasheet SCLS085L revised February 2025, shows the effect directly. One pin configuration figure covers the D, DB, N, NS, PW, J and W packages, meaning SOIC, SSOP, PDIP, SOP, TSSOP, CDIP and ceramic flat pack all share it.
| Pin | SN74HC14 function | Pin | SN74HC14 function |
| 1 | 1A, channel 1 input | 14 | VCC, positive supply |
| 2 | 1Y, channel 1 output | 13 | 6A, channel 6 input |
| 3 | 2A, channel 2 input | 12 | 6Y, channel 6 output |
| 4 | 2Y, channel 2 output | 11 | 5A, channel 5 input |
| 5 | 3A, channel 3 input | 10 | 5Y, channel 5 output |
| 6 | 3Y, channel 3 output | 9 | 4A, channel 4 input |
| 7 | GND, ground | 8 | 4Y, channel 4 output |
The pattern is worth internalising for 14-lead logic: ground on pin 7, supply on pin 14, functional channels filling the rest. It holds across the 74HC, 74AHC and CD4000 families in this package, which is why a schematic symbol drawn once serves the whole shelf.
It does not hold for analog parts. A 14-lead op amp, regulator or driver in the same package puts supplies wherever the die layout wants them. Read the specific datasheet; the package tells you nothing about function.
TSSOP-14 footprint and land pattern
Both TI and Diodes publish a recommended land for the 14-lead package, which lets the numbers be cross-checked rather than taken on trust.
| Land parameter | TI, drawing PW0014A | Diodes, TSSOP-14 outline |
| Pad pitch | 0.65 mm | 0.65 mm |
| Pad width | 0.45 mm | 0.45 mm |
| Pad length | 1.50 mm | 1.45 mm |
| Pad-row centre spacing | 5.80 mm | 5.90 mm |
| Outer edge to outer edge (Z) | 7.30 mm | 7.35 mm |
| Inner edge to inner edge (G) | 4.30 mm | 4.45 mm |
| Pad-to-pad gap | 0.20 mm | 0.20 mm |
| Land envelope | 4.35 x 7.30 mm | 4.35 x 7.35 mm |
The two disagree by 0.05 mm on the outer span and 0.15 mm on the inner gap. That is inside normal fabrication tolerance, so a single library part built to either set will accept parts from both. Use the TI geometry if you want the slightly longer pad and the larger heel fillet.
Check the fillets against the package tolerances. Outer pad edges 7.30 mm apart against a maximum lead span of 6.6 mm leaves 0.35 mm of toe extension. At minimum span with the longest foot, the heel sits 2.35 mm from centre against a pad inner edge at 2.15 mm, so 0.20 mm of heel fillet survives the worst stack.
Stencil apertures go one to one with the pads. A 0.45 mm by 1.50 mm opening in 0.125 mm foil gives an area ratio of 0.675 / (2 x 1.95 x 0.125) = 1.39, comfortably above the 0.66 release threshold. TI marks non-solder-mask-defined pads as preferred with 0.05 mm clearance all around, which is the right call at a 0.20 mm pad gap.
[IMAGE 2: land pattern with pad size, pitch and row spacing dimensioned | alt: “TSSOP-14 package footprint with 0.45 mm by 1.5 mm pads on 0.65 mm pitch”]
The thermal cost of a TSSOP-14 package
Here is the number most selection guides leave out. The 14-lead TSSOP is the smallest standard option at this pin count and the worst of them at moving heat. TI publishes all five package options for the SN74HC14 in one table, so the die and the test method are identical across the row.
| Thermal metric (SN74HC14) | PW TSSOP | D SOIC | DB SSOP | NS SOP | N PDIP |
| RθJA, junction to ambient | 151.7 | 133.6 | 114.8 | 122.6 | 60.7 |
| RθJC (top) | 79.4 | 89 | 64.5 | 81.8 | 47.8 |
| RθJB, junction to board | 94.7 | 89.5 | 65.1 | 83.8 | 40.6 |
| ΨJT | 25.2 | 45.5 | 23.7 | 45.4 | 26.9 |
| ΨJB | 94.1 | 89.1 | 64.4 | 83.4 | 40.5 |
| Package size, mm | 5 x 6.4 | 8.65 x 6 | 6.2 x 7.8 | 10.2 x 7.8 | 19.3 x 9.4 |
All figures in °C/W. Junction-to-ambient resistance in the TSSOP-14 package is 14 percent worse than SOIC-14, 32 percent worse than SSOP-14 and 2.5 times worse than PDIP-14. Less plastic, a smaller leadframe and shorter leads all shorten the conduction path out of the die.
One detail deserves attention from anyone working off an older datasheet. TI’s revision history records that the PW value was increased from 113 to 151.7 °C/W in revision K, June 2021, alongside similar increases for the D, DB and NS packages. A thermal budget built on the pre-2021 figure is roughly a third optimistic.
For logic gates this rarely bites, since a CMOS inverter dissipates milliwatts. It bites on 14-lead analog parts. A quad op amp driving loads, a linear regulator or a small driver in this package will reach junction temperature limits long before the same die in SOIC or PDIP, and the package thermal table is where that shows up.
Board area against SOIC-14 and SSOP-14
Area is the reason to accept the thermal penalty. The comparison below uses TI’s own package sizes for the SN74HC14 and land envelopes computed from the published land patterns.
| 14-lead package | Package area | Land envelope | Land area against SOIC-14 |
| TSSOP-14 (TI PW) | 32.0 mm² | 4.35 x 7.30 mm | 31.8 mm², 44 percent smaller |
| SSOP-14 (TI DB) | 48.4 mm² | 4.35 x 8.85 mm | 38.5 mm², 33 percent smaller |
| SOIC-14 (TI D) | 51.9 mm² | 8.22 x 6.95 mm | 57.1 mm², reference |
| SOP-14 (TI NS) | 79.6 mm² | not read here | not read here |
| PDIP-14 (TI N) | 181.4 mm² | not read here | through hole |
The land envelope matters more than the package size, because that is what the router has to clear. Against the SOIC-14 land the TSSOP-14 package saves roughly 25 mm² per part. On a board carrying ten 14-lead devices that is a quarter of a square centimetre of copper back, plus the routing channels underneath the shorter pad rows.
Height is often the real constraint rather than area. At 1.2 mm maximum, the TSSOP-14 clears card slots and shielding cans that a 1.75 mm SOIC-14 or a 2 mm SSOP-14 does not.
Moisture, reflow and packing
Moisture sensitivity is set by the device, not by the package. TI qualifies the tape-and-reel SN74HC14 in the TSSOP-14 package at Level-1-260C-UNLIM, which is unlimited floor life at a 260 °C peak. A DRV8833 in the same PW package family carries Level-3-260C-168 HR. Same outline, different die and mold compound, different handling rule.
Packing is where the TSSOP-14 package differs usefully from its neighbours. TI ships the 14-lead reel at 2,000 pieces on 12 mm tape with an 8 mm pocket pitch and a 6.9 by 5.6 by 1.6 mm cavity. The SOIC-14 version of the same device ships 2,500 pieces on 16 mm tape, and the SSOP-14 goes 2,000 pieces on 16 mm tape.
Feeder width follows from that. Moving a design from SOIC-14 to TSSOP-14 frees a 16 mm feeder slot and takes a 12 mm one, which is worth checking against machine capacity before the change is treated as free.
Lifecycle risk sits at the ordering-option level rather than the package level. On the SN74HC14, TI lists the tube and small-reel TSSOP part numbers as obsolete while the 2,000-piece reel stays in active production. The same is true of the SOIC option. Specify the reel part number on the BOM.
How to choose
Use these rules rather than a default.
- Height budget below 1.75 mm, or a shielding can, card slot or stacked assembly: the TSSOP-14 package is the only standard 14-lead option that clears 1.2 mm.
- Digital logic, dissipation in the milliwatt range: take TSSOP-14 for the area saving. The 151.7 °C/W figure is irrelevant when the part dissipates 5 mW.
- Analog parts that dissipate: run the junction temperature calculation with the package-specific figure before committing. SOIC-14 buys 18 °C/W and SSOP-14 buys 37 °C/W against the TSSOP.
- Hand assembly, prototyping or field rework: SOIC-14 at 1.27 mm pitch is easier. If the design must be TSSOP, budget flux, braid and magnification, and consider a dual-footprint breakout for the bring-up boards.
- Mixed BOM across pin counts: remember that the 14-lead and 16-lead TSSOP share a body length. Verify pad count and pin 1 offset in the library rather than trusting the outline.
- Before release, confirm the fabricator holds a 0.20 mm gap between non-solder-mask-defined pads, and confirm the assembler has a 12 mm feeder free.
Frequently asked questions
What are the dimensions of a TSSOP-14 package?
Body length 4.90 to 5.10 mm, body width 4.30 to 4.50 mm, seated height 1.2 mm maximum, lead pitch 0.65 mm and lead span 6.20 to 6.60 mm. Those figures come from TI package outline PW0014A, drawing 4220202/B, which references JEDEC registration MO-153.
What is the pinout of a TSSOP-14 package?
The package has no fixed pinout. Pin numbering runs counter-clockwise from the pin 1 index, and function depends on the device. On 14-lead logic the convention is inherited from DIP-14, with ground on pin 7 and supply on pin 14.
What is the footprint for a TSSOP-14 package?
TI publishes 0.45 mm by 1.50 mm pads on 0.65 mm pitch with 5.80 mm between pad-row centres, giving 7.30 mm across the outer edges. Diodes publishes 0.45 mm by 1.45 mm on 5.90 mm centres. The two agree within 0.15 mm and one library part covers both.
Is TSSOP-14 the same as SSOP-14?
No. Both use 0.65 mm pitch and 14 leads, but the SSOP-14 lead span is 7.4 to 8.2 mm against 6.2 to 6.6 mm for TSSOP-14, and SSOP is 2 mm tall against 1.2 mm. The pad rows sit 1.2 mm further apart, so the footprints are not interchangeable.
Can you hand-solder a TSSOP-14 package?
Yes. Pads are 0.45 mm wide with a 0.20 mm gap at 0.65 mm pitch, which drag-solders cleanly with flux and braid under a stereo microscope. Breakout boards carrying SOIC-14 on one face and TSSOP-14 on the other are widely sold for prototyping.
Does TSSOP-14 run hotter than SOIC-14?
Yes. On the same die TI measures 151.7 °C/W junction to ambient for the TSSOP against 133.6 °C/W for the SOIC. Less body, less leadframe and shorter leads all reduce the conduction path. For dissipating parts, check the per-package thermal table before choosing.
What to do next
Choose the TSSOP-14 package when height or area is the binding constraint and the part dissipates little. That covers most 14-lead logic, and the land pattern saves 44 percent of the copper area against SOIC-14 with no assembly penalty on a modern line.
Choose SOIC-14 or SSOP-14 when the part dissipates, when hand rework is likely, or when the thermal table shows a number you cannot budget. And before releasing any TSSOP-14 layout, verify three figures against the drawing: 0.65 mm pitch, 3.90 mm lead-row length, and a 6.2 to 6.6 mm lead span rather than the 4.4 mm body width.
