The TSOP-66 package is a 66-lead thin small outline package, Type II, measuring 22.22 mm by 10.16 mm with a 1.20 mm maximum height and 0.65 mm lead pitch. Nearly every DDR1 SDRAM in x8 and x16 organization shipped in it. Below are verified dimensions from two manufacturer drawings, the DDR x16 pin assignment, a land pattern worked from maximum material condition, and an honest read on what is still orderable.
Key takeaways
- Body is 22.22 mm x 10.16 mm, 1.20 mm maximum height, 0.65 mm pitch, 11.76 mm nominal lead span. The “400 mil” in datasheet titles is the body width, not the span your pads must reach.
- Pin 1 centre sits 0.71 mm from the end of the body. Thirty-three leads per long edge span 20.80 mm centre to centre.
- At 0.65 mm the package sits above IPC‑7351’s 0.625 mm fine-pitch threshold, so ordinary gull-wing land rules apply rather than fine-pitch rules.
- Body volume is under 350 mm³ and thickness under 1.6 mm, which places the Pb-free classification temperature at 260 °C under J‑STD‑020 Table 4‑2.
- Alliance Memory is the last broad-line source. Its 2026 cross reference marks the Samsung, Micron, SK hynix and Nanya DDR1 equivalents end of life.
- DDR2 and everything after it left this package. Alliance lists no TSOP II option above DDR1; the follow-on parts are 60, 84 and 96-ball FBGA.
What the TSOP-66 package actually is
The TSOP-66 package is a 66-lead thin small outline package, Type II, with gull-wing leads on the two long edges. The plastic body measures 22.22 mm by 10.16 mm, stands 1.20 mm tall at most, uses 0.65 mm lead pitch, and spans 11.76 mm from lead tip to lead tip. It was the standard package for DDR1 SDRAM in x8 and x16 organizations.
JEDEC separates the two TSOP families by where the leads leave the body: Type I on the short edges, Type II on the long edges. A 66-lead TSOP is always Type II. Manufacturer drawings name it accordingly. Renesas publishes it as a 66-pin plastic TSOP (II) with a 10.16 mm (400) body under drawing code PTSB0066JB, and Micron’s DDR 400 addendum calls the same outline a 66-pin plastic TSOP (400 mil). Distributor parametric filters shorten all of this to TSOP-66.
One number causes most of the layout errors on this part. The 400 mil figure is dimension E, the moulded body width. The dimension a footprint has to reach is HE, the lead span, at 11.76 mm nominal and 11.96 mm maximum. Laying out to 10.16 mm puts the pads under the lead bend instead of under the foot.
[IMAGE 1: dimensioned outline of the 66-lead TSOP II showing D, E, HE, e, L and A | alt: “TSOP-66 package dimensions diagram showing 22.22 mm body, 10.16 mm width, 11.76 mm lead span and 0.65 mm pitch”]
TSOP-66 package dimensions
Both columns below are read from published drawings: Alliance Memory’s AS4C16M16D1A datasheet, rev 1.2, August 2015, and Micron’s 256 Mb x8/x16 DDR 400 addendum, rev C. All values in millimetres.
| Symbol | Parameter | Min | Nom | Max | Micron drawing (rev C) |
| A | Overall height | — | — | 1.20 | 1.20 max |
| A1 | Standoff | 0.05 | — | 0.20 | 0.15 (ref) |
| A2 | Body thickness | 0.90 | 1.00 | 1.10 | not separately stated |
| D | Body length | 22.09 | 22.22 | 22.35 | 22.22 ± 0.08 |
| E | Body width (400 mil) | 10.03 | 10.16 | 10.29 | 10.16 ± 0.08 |
| HE | Lead span, tip to tip | 11.56 | 11.76 | 11.96 | 11.76 ± 0.10 |
| e | Lead pitch | — | 0.65 | — | 0.65 typ |
| b | Lead width | 0.22 | — | 0.45 | 0.32 ± 0.075 |
| c | Lead thickness | 0.095 | 0.125 | 0.21 | — |
| L | Foot length | 0.40 | 0.50 | 0.60 | 0.50 ± 0.10 |
| L1 | Formed lead length | — | 0.80 | — | 0.80 typ |
| S | Body end to pin 1 centre | — | 0.71 | — | 0.71 |
| y | Coplanarity | — | — | 0.10 | 0.10 |
| θ | Lead foot angle | 0° | — | 8° | — |
Two derived numbers are worth carrying into layout. Thirty-three leads at 0.65 mm pitch span 32 x 0.65 = 20.80 mm from the first to the last lead centre. Subtract that from the 22.22 mm body and split the remainder, and pin 1 lands 0.71 mm from the body end, which is exactly the S dimension both drawings publish. The 0.71 mm figure is the one to check a suspect footprint against, because it fails visibly when a library part has been drawn to the wrong body length.
Standoff matters as much as height on this package. A1 minimum is 0.05 mm, so under a worst-case part the body sits less than a tenth of a millimetre off the board. Anything routed or tented under the body needs that clearance accounted for, including via-in-pad tenting and silkscreen.
TSOP-66 pinout
Leads split 33 per side, numbered counter-clockwise from the pin 1 identifier. The assignment below is Alliance Memory’s AS4C16M16D1A, a 256 Mb 16M x 16 DDR1 device, top view. Nanya’s NT5DS16M16 datasheet lists the same signal set for its 66-pin x16 part, which is what made drop-in second sourcing practical across this generation.
| Pin | Signal | Pin | Signal |
| 1 | VDD | 34 | VSS |
| 2 | DQ0 | 35 | A4 |
| 3 | VDDQ | 36 | A5 |
| 4 | DQ1 | 37 | A6 |
| 5 | DQ2 | 38 | A7 |
| 6 | VSSQ | 39 | A8 |
| 7 | DQ3 | 40 | A9 |
| 8 | DQ4 | 41 | A11 |
| 9 | VDDQ | 42 | A12 |
| 10 | DQ5 | 43 | NC |
| 11 | DQ6 | 44 | CKE |
| 12 | VSSQ | 45 | CK |
| 13 | DQ7 | 46 | CK# |
| 14 | NC | 47 | UDM |
| 15 | VDDQ | 48 | VSS |
| 16 | LDQS | 49 | VREF |
| 17 | NC | 50 | NC |
| 18 | VDD | 51 | UDQS |
| 19 | NC | 52 | VSSQ |
| 20 | LDM | 53 | NC |
| 21 | WE# | 54 | DQ8 |
| 22 | CAS# | 55 | VDDQ |
| 23 | RAS# | 56 | DQ9 |
| 24 | CS# | 57 | DQ10 |
| 25 | NC | 58 | VSSQ |
| 26 | BA0 | 59 | DQ11 |
| 27 | BA1 | 60 | DQ12 |
| 28 | A10 / AP | 61 | VDDQ |
| 29 | A0 | 62 | DQ13 |
| 30 | A1 | 63 | DQ14 |
| 31 | A2 | 64 | VSSQ |
| 32 | A3 | 65 | DQ15 |
| 33 | VDD | 66 | VSS |
Four things in that table drive board design. The data bus is split into byte lanes with independent strobe and mask: LDQS and LDM serve DQ0 to DQ7, UDQS and UDM serve DQ8 to DQ15. Supply and return alternate through the data leads, with a VDDQ or VSSQ roughly every third position, which is how a leadframe package held signal integrity at 200 MHz and 400 Mbps per pin. VREF on pin 49 is the SSTL_2 reference at half VDDQ and wants a local capacitor and a quiet divider, not a fat trace. Seven leads (14, 17, 19, 25, 43, 50 and 53) are no-connect on the x16 device.
The x8 members of the family, such as Alliance’s AS4C64M8D1, use the same 66-lead outline with the upper byte reassigned. Read the specific datasheet rather than assuming symmetry; a footprint is shared across the family but a pin assignment is not.
[IMAGE 2: pin 1 corner detail showing the 0.71 mm offset and lead numbering direction | alt: “TSOP-66 pinout showing pin 1 located 0.71 mm from the package end”]
TSOP-66 footprint and land pattern
Nothing in the drawings fixes the footprint, so it has to be worked from the tolerance extremes. Start from the lead span: half of HE runs from 5.78 mm at minimum material to 5.98 mm at maximum. Subtract the foot length L, which runs 0.40 mm to 0.60 mm, and the heel of the foot sits between 5.18 mm and 5.58 mm from the package centreline. A pad whose inner edge is at 4.85 mm and outer edge at 6.35 mm covers every combination of those extremes with fillet to spare.
| Land pattern parameter | Value |
| Pad pitch | 0.65 mm (fixed by the package) |
| Pads per row | 33, two rows |
| Row length, first to last pad centre | 20.80 mm |
| Pad width | 0.40 mm |
| Pad length | 1.50 mm |
| Outer span, pad outer edge to outer edge (Z) | 12.70 mm |
| Inner gap, pad inner edge to inner edge (G) | 9.70 mm |
| Worst-case toe fillet | 0.37 mm |
| Worst-case heel fillet | 0.33 mm |
| Pad-to-pad gap | 0.25 mm |
| Courtyard | 12.70 mm x 22.35 mm plus assembly clearance |
That gives 0.37 mm of toe extension and 0.33 mm of heel extension under the worst stack-up, and full foot coverage under every other combination. Pad width of 0.40 mm sits above the 0.395 mm maximum lead width on Micron’s drawing and leaves 0.25 mm between adjacent pads, enough for a 0.10 mm solder mask dam with 0.075 mm expansion per side.
IPC-7351 names this geometry SOP65P1176X120-66N: gull-wing small outline, 0.65 mm pitch, 11.76 mm nominal lead span, 1.20 mm height, 66 leads, nominal density. Worth knowing because 0.65 mm falls above IPC’s 0.625 mm fine-pitch boundary, so the ordinary gull-wing side goal of 0.03 mm applies rather than the negative side goal used for genuine fine pitch. Practically, this package does not need fine-pitch stencil or placement rules.
Stencil aperture follows straight from the pad. A 0.40 mm by 1.50 mm aperture in 0.12 mm foil gives an area ratio of 0.60 / (2 x 1.90 x 0.12) = 1.32, comfortably above the 0.66 release threshold. There is no reason to reduce the aperture on this part; bridging on 0.65 mm pitch comes from paste volume and placement offset, not from release.
[IMAGE 3: land pattern drawing with Z, G, pad width and pitch called out | alt: “TSOP-66 footprint land pattern with 0.65 mm pitch, 0.40 mm pads and 12.70 mm outer span”]
TSOP-66 against the rest of the TSOP II family
The 400 mil TSOP II family shares a body width and, above 44 leads, a body length. What changes is pitch, and that is what makes the footprints mutually incompatible despite the identical outline.
| Package | Leads/side | Body D x E (mm) | Pitch | Typical device |
| 44-pin TSOP II | 22 | 18.81 x 10.16 | 0.80 mm | Async SRAM, 400 mil family |
| 54-pin TSOP II | 27 | 22.22 x 10.16 | 0.80 mm | SDR SDRAM x4, x8, x16 |
| 66-pin TSOP II | 33 | 22.22 x 10.16 | 0.65 mm | DDR1 SDRAM x8, x16 |
| 86-pin TSOP II | 43 | 22.42 x 10.29 (max) | see datasheet | SDR SDRAM x32 |
The 54-lead and 66-lead parts are the pair most often confused, because both are 22.22 mm by 10.16 mm and both carry SDRAM. A 54-lead SDR part on a 66-lead land pattern is a scrapped board, not a rework. The tell is pitch: 0.80 mm against 0.65 mm, which is visible on a bare part under a loupe by counting leads across a 10 mm span.
Alliance also ships a 50-pin TSOP II for 16 Mb SDR. It appears in the catalogue but not in this comparison because the pitch was not stated in the sources checked here.
Reflow, moisture and rework
Package volume decides the reflow ceiling. Taking body dimensions at nominal and overall height at maximum, 22.22 x 10.16 x 1.20 gives roughly 271 mm³, and body thickness is 1.20 mm. Both land in the first cell of J-STD-020 Table 4-2: under 350 mm³ and under 1.6 mm, so the Pb-free classification temperature is 260 °C. Alliance’s datasheet is consistent, listing 260 °C as the absolute maximum soldering temperature.
The moisture sensitivity level is not printed in either datasheet examined. Read it off the dry-pack label rather than assuming; thin leadframe memory packages of this era were commonly classified at level 3, but that is a pattern, not a specification for a given lot.
Coplanarity is specified at 0.10 mm maximum across all 66 leads. On a 22 mm package that is a tight budget, and it is the parameter that degrades in loose trays and after hand handling. Parts recovered from harvested boards routinely fail it, which is the practical reason reclaimed TSOP-66 devices produce open heels rather than shorts.
For rework, the low profile helps and the fine lead does not. Hot air at 0.65 mm pitch works with a preheated board and a nozzle sized to the body; drag soldering is feasible on this pitch but leaves the heel fillet unverifiable without an angled inspection. On a DDR bus, a marginal heel shows up as a data-eye problem months later rather than as a hard fail on test.
Sourcing a TSOP-66 part in 2026
Alliance Memory’s 2026 product catalogue is the clearest picture of what survives. It lists 66-pin TSOP II across the whole DDR1 range, 64 Mb through 1 Gb, at 2.5 V, and lists no TSOP II option at DDR2 or above. The package did not shrink out of use gradually; it stopped at the DDR1 to DDR2 boundary, where the industry moved to 60, 84 and 96-ball FBGA.
| Density | Alliance | Samsung (EOL) | Micron (EOL) | ISSI | Winbond |
| 64 Mb | AS4C4M16D1A-5TxN | K4H641638N | MT46V4M16TG | IS43R16400B | W9464G6K(I,J)H |
| 128 Mb | AS4C8M16D1A-5TxN | K4H281638D | MT46V8M16 | IS43R16800E-5TL | W9412G6K(I,J)H |
| 256 Mb | AS4C16M16D1A-5TxN | K4H561638D | MT46V16M16P | IS43R16160 | W945G6K(D,E,J)H |
| 512 Mb | AS4C32M16D1A-5TxN | K4H511638J | MT46V32M16P | IS43R16320 | — |
| 1 Gb | AS4C64M16D1-6TxN | — | MT46V64M16P | — | — |
Two details in that catalogue change sourcing decisions. Every Samsung, Micron, SK hynix and Nanya entry in the DDR1 cross reference is marked end of life, leaving Alliance and ISSI as the current-production paths. And the 1 Gb part is derated: AS4C64M16D1-6TxN runs 166 MHz and 333 Mbps against 200 MHz and 400 Mbps at every smaller density. A design that assumed DDR-400 timing across the family will miss on the top density.
Distributor stock tells the same story. Checking DigiKey in August 2026, Micron’s MT46V16M16P-5B and Alliance’s AS4C32M16D1-5TCN are both flagged obsolete, and AS4C16M16D1A-5TCN listed between roughly 3.31 and 4.76 US dollars per unit with zero on-hand stock across the listings examined. Prices at that level for a 256 Mb device are a lifecycle signal, not a market rate. Quote against authorised channel with a lead time and treat broker-sourced TSOP-66 as requiring incoming inspection, decap or X-ray sampling, and a coplanarity check.
When to keep TSOP-66 and when to move to FBGA
Use the decision rules rather than a preference.
- Repairing or rebuilding an existing DDR1 board: keep TSOP-66, buy Alliance or ISSI current production, and match the exact organization and speed grade rather than the package alone.
- New design under 512 Mb that genuinely needs a leaded package, for inspection access, conformal coat, or a two-layer board: TSOP-66 is defensible, and it is the last DRAM package where every joint is visible.
- New design needing 1 Gb or more, or any part running above 400 Mbps: move to FBGA. The 66-lead package tops out at 333 Mbps at 1 Gb, and nothing above DDR1 was ever offered in it.
- Automotive or long-life industrial: check the temperature grade explicitly. Alliance lists automotive grades on only part of the DDR1 range, and grade availability differs between the TSOP II and FBGA versions of the same density.
- Cost-driven volume build: run the numbers before assuming the leaded part is cheaper. At current lifecycle pricing the FBGA equivalent is usually the lower-cost line item despite the harder assembly.
Frequently asked questions
Is TSOP-66 the same as 66-pin TSOP II?
Yes. TSOP-66 is the distributor shorthand; manufacturers write 66-pin plastic TSOP (II), 400 mil. There is no 66-lead Type I variant in production memory, so the two names refer to the same 22.22 mm by 10.16 mm outline with 0.65 mm pitch and leads on the long edges.
What is the pitch of a TSOP-66 package?
0.65 mm, typical, with no tolerance published on the pitch itself. Lead position is controlled instead by a true-position requirement; Renesas states each lead centreline stays within 0.12 mm of true position at maximum material condition. The 54-pin TSOP II that shares the same body uses 0.80 mm.
How big is the TSOP-66 footprint on the board?
Wider than the body. The pads must reach the 11.76 mm nominal lead span, not the 10.16 mm body. A worked land pattern lands at 12.70 mm across the outer pad edges, 9.70 mm between inner edges, with 0.40 mm by 1.50 mm pads on 0.65 mm pitch.
Can TSOP-66 be hand-soldered?
Yes, with flux and a fine tip or hot air. The 0.65 mm pitch is above IPC’s fine-pitch threshold, so it is closer to TSSOP than to a fine-pitch QFP. The risk is not bridging but an unwetted heel, which passes continuity and fails later at speed.
What replaced the TSOP-66 package?
FBGA. DDR2 and later generations were never offered in 66-lead TSOP II. Alliance’s current catalogue moves the same densities to 60-ball and 84-ball FBGA at DDR2, and 78, 96 and 200-ball packages beyond. TSOP-66 stayed on DDR1 to the end.
Is a 54-pin TSOP II part a drop-in for TSOP-66?
No. Both share the 22.22 mm by 10.16 mm body, which makes them look interchangeable in a mechanical model, but the pitch differs (0.80 mm against 0.65 mm) and so do lead count, pin assignment and the memory interface. The footprints are not compatible in either direction.
What to do next
If a board already carries TSOP-66 and the density is 512 Mb or below, keep the package and source Alliance or ISSI current production, with the caveat that stock is thin and quoted lead times are the number to plan around. If the design is new, or needs 1 Gb, or runs anything faster than DDR-400, the package has nothing left to offer and FBGA is the answer.
Before releasing any TSOP-66 layout, check three numbers against the drawing: 0.71 mm from body end to pin 1, 11.76 mm lead span rather than 10.16 mm body width, and 0.65 mm pitch rather than 0.80 mm. Those three catch nearly every footprint error this package produces.
