The TO-39 package is a hermetic metal can with a 8.51–9.40 mm base flange, three leads on a 5.08 mm pin circle, and a locating tab. JEDEC re-registered it as TO-205AD. It is the taller sibling of the TO-18 and shares its cap with the TO-5 family.

Below are the controlled dimensions, the pin assignments, and the thermal limits that decide whether the part survives.

[IMAGE 1: overhead and side photograph of a 3-lead TO-39 can beside a TO-18 and a TO-220, on graph paper | alt: “TO-39 package metal can shown next to TO-18 and TO-220 packages for scale”]

Key takeaways

• TO-39 and TO-205AD are the same outline. JEDEC renamed it; datasheets still print the old name.
• The tab locates pin 1 but does not prevent wrong insertion. On the 3-lead version the asymmetric pin spacing does.
• The same outline carries three different lead codes — transistor, SCR, and TRIAC — so the package never tells you the pin function.
• A TO-39 caps the LM317 at 0.5 A output where the same die in a TO-3 does 1.5 A. The limit is thermal, not silicon.
• Most classic TO-39 transistors are gone. The package survives in optoelectronics and hi-rel, not in new transistor designs.

TO-39 package dimensions from the controlled drawing

These are Central Semiconductor’s controlled TO-39 case dimensions, revision R1. Note the tolerance bands — several ranking pages quote single nominal figures that sit inside these windows.

Symbol	Feature	Inches (min / max)	Millimeters (min / max)
A	Base flange diameter	0.335 / 0.370	8.51 / 9.40
B	Cap diameter	0.315 / 0.335	8.00 / 8.51
C	Standoff below seating plane	— / 0.040	— / 1.02
D	Cap height	0.240 / 0.260	6.10 / 6.60
E	Lead length	0.500 / —	12.70 / —
F	Lead diameter	0.016 / 0.021	0.41 / 0.53
G	Pin circle diameter	0.200 (basic)	5.08 (basic)
H	Pin-to-pin chord	0.100 (basic)	2.54 (basic)

Two numbers drive the footprint. The 5.08 mm pin circle with 2.54 mm chords puts the three leads on a standard 0.1 in grid, which is why TO-39 parts drop into perfboard. The 1.02 mm maximum standoff means the flange can sit almost flat on the board, so any unmasked copper under the can is a short waiting to happen — the flange is usually tied to one of the pins.

The package weighs about 1006 mg, per Central’s material composition sheet dated 16 July 2018. The header is Kovar at roughly 631 mg; the cap is a steel alloy at 350 mg, nickel-plated inside and matte-tin plated outside. That mass matters for shock and vibration screening — it is roughly five times a TO-18.

National Semiconductor drawings, now published by TI as SNOA033, split the outline into three package codes: H03A for the low-profile 3-lead can, H03B for the high-profile version, and HA04E for the 4-lead variant. If a legacy datasheet names one of these, that is your TO-39.

TO-39 pinout: the outline does not tell you the pin function

The tab sits 45° from pin 1. Beyond that, pin function depends entirely on the device type. Central’s package sheet registers three lead codes against the identical outline:

Device type	Pin 1	Pin 2	Pin 3
Transistor	Emitter	Base	Collector
SCR	Cathode	Gate	Anode
TRIAC	MT1	Gate	MT2

On most TO-39 transistors the case is the collector, which is what makes press-on heatsinks work and what makes the case live. Some regulators tie the case to the output instead — the LM317H connection diagram is explicit that the case is the output terminal, not ground.

The tab is an orientation aid, not a poka-yoke. On the 3-lead version, the leads are the 4-lead pattern with one pin omitted, so the asymmetry alone prevents backward insertion. On 4- and 8-lead variants, symmetry returns and the tab is all you have.

What the metal can costs you

The clearest way to see the package’s limits is the same die in different bodies. National’s LM117/LM317 family shipped in seven packages from one design:

Package	Suffix	Rated output current	θJC	θJA, no heatsink
TO-3	K	1.5 A	2 °C/W	39 °C/W
TO-220	T	1.5 A	4 °C/W	50 °C/W
TO-39	H	0.5 A	21 °C/W	186 °C/W
TO-252	MDT	0.5 A	12 °C/W	103 °C/W

Same silicon, one third the current rating. The TO-39’s junction-to-case path is over ten times worse than the TO-3’s, and its bare junction-to-ambient figure is the worst of the four — a surface-mount TO-252 on copper beats it. Current limit follows: the LM117 in a K package limits at 2.2 A typical, the H package at 0.8 A.

The metal can does buy two things back. It is hermetic, and it takes more heat during assembly — the LM117 absolute maximum ratings allow 300 °C for 10 seconds on the metal package against 260 °C for 4 seconds on the plastic one. That is a real margin for hand rework of legacy boards.

Sizing the thermal path

Take an LM317H stepping 15 V down to 5 V at 200 mA in a 50 °C enclosure. Dissipation is (15 − 5) × 0.2 = 2.0 W. The LM317 is rated to TJ = 125 °C, so the allowable rise is 75 °C and the required θJA is 75 / 2.0 = 37.5 °C/W.

The bare package is 186 °C/W. It misses by a factor of five.

Work it backwards instead. With no heatsink, allowable dissipation is 75 / 186 = 0.40 W, which at a 10 V differential is 40 mA — not 500 mA. Add a press-on sink such as the Boyd 2227B, listed at 21 °C/W for TO-5 and TO-39 cans, and the stack becomes roughly 21 (θJC) + 21 (θSA) plus the contact term, call it 45 °C/W. That allows 1.67 W, or about 167 mA at the same differential.

[IMAGE 2: thermal resistance network diagram for a TO-39 with press-on heatsink, showing junction, case, sink, and ambient nodes | alt: “TO-39 package thermal resistance network from junction to ambient with press-on heatsink”]

The package’s 0.5 A rating is reachable only at small input-output differentials. Size to the dissipation, never to the current headline.

What is still made, and what is not

The classic TO-39 RF transistors are largely finished. Central Semiconductor’s product discontinuation notice PDN01114, dated 6 September 2019, moved the 2N3866, 2N3866A, 2N4427, and 2N5109 to stock-only status with no replacement offered. The 2N3866 was a genuinely capable part — 5.0 W at TC = 25 °C, θJC of 35 °C/W, 3.0 pF output capacitance, and an fT of 500 MHz (800 MHz for the A grade), per Central revision R2. Nothing in a plastic package replaced it directly.

Where the TO-39 package is still specified is optoelectronics and high-reliability work. GPD Optoelectronics lists TO-39 and TO-8 headers as standard packaging for its two-color detectors; Marktech offers InGaAs PIN photodiodes in TO-5, TO-18, and TO-39 cans. Header manufacturers such as EPI still build TO-39 bodies to order, specifically to retrofit obsolete packages. On the hi-rel side, screened parts persist — the LM117H was catalogued with an /883 option, 20 per tray.

Design in a TO-39 today for a windowed optical device, a hermetic sensor, or a qualified replacement. Do not design one in for a new power transistor.

Frequently asked questions

What is the TO-39 package?

A hermetically sealed metal can for semiconductors, registered by JEDEC as TO-205AD. It has a base flange of 8.51 to 9.40 mm, a cap 6.10 to 6.60 mm tall, and leads on a 5.08 mm pin circle. Usually three leads, with variants up to eight or ten.

What is the difference between TO-39 and TO-5?

They share cap dimensions and the 5.08 mm pin circle. The practical difference is lead length: TO-5 was registered with 38.1 mm minimum leads for point-to-point wiring, while TO-39 shortened them to 12.7 mm minimum for through-hole boards. Manufacturers frequently use the two names interchangeably.

What is the pinout of a TO-39 transistor?

Viewed from the bottom with the tab as reference, pin 1 is the emitter, pin 2 the base, and pin 3 the collector, with the case normally connected to the collector. SCRs and TRIACs use the same outline with different assignments, so confirm against the specific datasheet.

Is TO-39 the same as TO-205AD?

Yes. JEDEC re-registered the 5.08 mm pin-circle metal cans under the TO-205 family: TO-5 became TO-205AA, TO-12 became TO-205AB, TO-33 became TO-205AC, and TO-39 became TO-205AD. Both designations appear in current datasheets and distributor listings.

What to do next

If you are laying out an existing TO-39 part, draw the footprint to a 5.08 mm pin circle on 2.54 mm chords, keep copper clear under the flange, and confirm the lead code against the device datasheet rather than the package name. If you are choosing a package for a new design, take the TO-39 only when you need hermeticity, an optical window, or a qualified equivalent — and then budget the thermal path around a 21 °C/W junction-to-case figure, not around the current rating on the front page.

Before you commit, check the exact orderable part number for lifecycle status. The 2019 discontinuation of the 2N3866 family is representative, not exceptional.

External references

• Central Semiconductor TO-39 package detail and material composition
• Central Semiconductor 2N3866 / 2N3866A datasheet and PDN01114
• National Semiconductor LM117 / LM317A / LM317 datasheet DS009063
• Texas Instruments SNOA033, Metal Can Packages
• Analog Devices 3-lead TO-39 outline, LTC DWG 05-08-1330

Proposed internal links

• [INTERNAL LINK: TO-18 package → TO-18 package dimensions and pinout]
• [INTERNAL LINK: junction-to-case thermal resistance → thermal resistance fundamentals for power design]
• [INTERNAL LINK: hermetic packages → hermetic versus plastic semiconductor packaging]
• [INTERNAL LINK: JEDEC transistor outlines → JEDEC JEP95 outline naming explained]
• [INTERNAL LINK: component lifecycle → reading PCNs and PDNs before you release a BOM]