QFP pitch decides four things at once: pad width, copper gap, stencil thickness and coplanarity limit. Drop from 0.5 mm to 0.4 mm and the pitch falls 20%, but the copper gap between adjacent pads falls 27%, from 0.22 mm to 0.16 mm on an IPC nominal land. Placement tolerance does not shrink with it. That mismatch is the whole story, and it is worked out below at every pitch.

[IMAGE 1: Four QFP corner details side by side at 0.8, 0.65, 0.5 and 0.4 mm pitch, each with pad width and copper gap dimensioned to scale | alt: “QFP pitch comparison showing pad width and copper gap at 0.8, 0.65, 0.5 and 0.4 mm”]

Key Takeaways

• IPC-7351 changes footprint rules at 0.625 mm pitch. Above it the side fillet goal is positive; at or below it the goal goes negative, so the correct pad is narrower than the widest lead.
• NXP recommends pad width at roughly 60% of pitch: 0.26 mm at 0.40 mm, 0.30 mm at 0.50 mm, 0.38 mm at 0.65 mm and 0.50 mm at 0.80 mm (AN4388 rev. 2.0).
• Coplanarity tightens as pitch falls. Supplier limits run 0.10 mm at 0.65 mm pitch and above, and 0.08 mm at 0.5 mm and finer.
• A ±50 µm placement machine consumes 17% of the copper gap at 0.8 mm pitch and 36% of it at 0.4 mm. The machine did not get worse; the gap got smaller.
• Stencil foil is capped by pitch, not by area ratio. Infineon recommends 130 µm to 150 µm at 0.5 mm pitch and a maximum of 130 µm at 0.4 mm.
• At 0.4 mm pitch a guaranteed solder mask dam between pads is not achievable on ordinary fabrication. Plan for a ganged mask opening from the start.

What QFP Pitch Means and Which Values Exist

QFP lead pitch is the centre-to-centre distance between adjacent gull-wing leads on one side of the package. Standard values are 1.0, 0.8, 0.65, 0.5, 0.4 and 0.3 mm. Pitch sets pin count for a given body size, and it drives pad width, stencil thickness and the coplanarity limit the supplier will hold.

Four of those values carry the volume. 0.8 mm and 0.65 mm dominate low-pin-count parts, 0.5 mm is the workhorse for microcontrollers and low-density FPGAs, and 0.4 mm is the practical floor for standard assembly.

The 0.3 mm and 1.0 mm ends exist but rarely matter. 1.0 mm QFP is largely historical, and 0.3 mm sits at the edge of the format: PCBCart puts the practical QFP limit around 360 pins at 0.3 mm pitch, where bridging losses climb steeply.

Naming is inconsistent here too. Some suppliers call a 0.5 mm pitch part an SQFP or VQFP, and others apply SQFP to 0.65 mm and 0.4 mm as well. In the JEITA-style prefix scheme, F means fine pitch and denotes 0.5 mm or below. IPC defines Fine-Pitch Technology as terminations on less than 0.625 mm centres. Two thresholds, both in use.

The 0.625 mm Line That Changes the Footprint Rules

IPC-7351 carries two fillet goal tables for gull-wing leads, and they split at exactly 0.625 mm. Table 3-2 covers pitch above that line; Table 3-3 covers 0.625 mm and below. Toe, heel and courtyard values are identical between them. Only the side goal changes.

Pitch band	Level C (Least)	Level B (Nominal)	Level A (Most)
Above 0.625 mm (0.65 and 0.8 mm QFP)	0.01	0.03	0.05
0.625 mm and below (0.5 and 0.4 mm QFP)	−0.04	−0.02	0.01

Table 1. IPC-7351 side fillet goal, in mm, either side of the 0.625 mm line

The sign flip is deliberate. Below 0.625 mm the clearance between adjacent pads matters more than a visible side fillet, so the standard narrows the pad to buy the gap back. Above the line it does the opposite.

The practical consequence: a footprint library built with the coarse-pitch side goal will oversize every pad on a 0.5 mm or 0.4 mm part by 0.10 mm total width. That is designed-in bridging, and it is the most common footprint error at fine pitch.

Why the Copper Gap Shrinks Faster Than the Pitch

Pad width does not scale linearly with pitch, because the IPC equation adds a fixed tolerance term regardless of how fine the pitch is.

Take two Analog Devices drawings at the same 7 × 7 mm body. The ST-48 LQFP (JEDEC MS-026-BBC) runs 0.50 mm pitch with lead width 0.17 / 0.22 / 0.27 mm. The SU-64-1 TQFP (MS-026-ABD) runs 0.40 mm pitch with lead width 0.13 / 0.18 / 0.23 mm.

Run Xmax = Wmin + 2Js + √(CW² + F² + P²) at IPC Level B, assuming 0.10 mm fabrication tolerance and 0.05 mm placement tolerance. The tolerance term is 0.15 mm in both cases, because the lead width tolerance is 0.10 mm on both parts.

• At 0.50 mm pitch: X = 0.17 − 0.04 + 0.15 = 0.28 mm. Copper gap = 0.50 − 0.28 = 0.22 mm.
• At 0.40 mm pitch: X = 0.13 − 0.04 + 0.15 = 0.24 mm. Copper gap = 0.40 − 0.24 = 0.16 mm.

The pitch fell 20% and the gap fell 27%. The tolerance term did not move at all, so it eats a larger share of a smaller budget every time you step down.

Pitch	Pad width (NXP AN4388)	Copper gap	±50 µm placement as share of gap
0.80 mm	0.50 mm	0.30 mm	17%
0.65 mm	0.38 mm	0.27 mm	19%
0.50 mm	0.30 mm	0.20 mm	25%
0.40 mm	0.26 mm	0.14 mm	36%

Table 2. Copper gap by pitch, using NXP recommended pad widths, with placement tolerance expressed as a share of the gap

Infineon puts modern vision-equipped placement machines at ±50 µm or better. That number is a constant across the table. What changes is how much of your margin it consumes, and at 0.4 mm pitch it is over a third before paste variation, board stretch or lead bend are counted.

Solder Mask Runs Out Before the Copper Does

A mask dam between adjacent pads needs the copper gap, minus mask registration on both sides, to still exceed the fabricator minimum web.

Typical mask registration is about ±0.05 mm per side and JLCPCB states a 0.1 mm minimum solder mask bridge. At 0.5 mm pitch with a 0.22 mm gap, that leaves roughly 0.12 mm of guaranteed dam, which clears the minimum. At 0.4 mm pitch with a 0.16 mm gap it leaves about 0.06 mm, which does not.

So at 0.40 mm pitch, design for a ganged mask opening across the lead row rather than individual dams, and rely on paste volume and placement accuracy to prevent bridging. Confirm the registration figure with your own board shop before you commit; it is a fabricator capability, not a standard.

[IMAGE 2: Two cross-sections of adjacent QFP pads at 0.5 mm and 0.4 mm pitch, showing the copper gap, mask registration tolerance either side, and the dam width left over | alt: “Solder mask dam width remaining at 0.5 mm and 0.4 mm QFP pitch after registration tolerance”]

How QFP Pitch Sets Stencil and Paste

The usual stencil constraint on small pads is the IPC-7525 area ratio, which has to stay above 0.66. On a QFP it rarely binds, because the apertures are long rectangles rather than squares.

Pitch	Recommended foil	Aperture	Area ratio	Aspect ratio
0.80 mm	0.15 to 0.20 mm	0.50 × 1.60 mm	1.27	3.3
0.65 mm	0.15 to 0.20 mm	0.38 × 1.60 mm	1.02	2.5
0.50 mm	0.13 to 0.15 mm	0.30 × 1.60 mm	0.97	2.3
0.40 mm	0.13 mm maximum	0.26 × 1.60 mm	0.86	2.0

Table 3. Stencil parameters by pitch, with area ratio computed for a 1:1 aperture on a 1.60 mm long pad

Every value clears the IPC-7525 thresholds of 0.66 for area ratio and 1.5 for aspect ratio with margin. Paste release is not what limits a QFP. Paste volume against bridging is.

That is why the foil recommendation is capped by pitch rather than derived from the ratios. Infineon specifies 130 µm to 150 µm for a typical 0.5 mm pitch QFP and a maximum of 130 µm at 0.4 mm, and recommends Type 4 paste for the family. NXP gives 0.13 mm to 0.20 mm depending on pitch, and Toshiba 125 µm to 175 µm.

One trap: if a 0.4 mm pitch QFP shares a board with a part that wants a thicker foil, do not compromise on a single thickness. Step the stencil. Thinning the whole board to suit the fine-pitch part starves everything else.

Coplanarity Tightens as Pitch Falls

Lead tip deviation has to stay within a fraction of the printed paste height, and that height falls with foil thickness. So the coplanarity limit tracks pitch downward.

Pitch	Max coplanarity	Source
1.0 mm	0.14 mm	US 7,462,943, citing industry practice
0.80 mm	0.10 mm	Altera Device Package Information ver. 9.1, Table 15 (pitch 0.65 mm or greater)
0.65 mm	0.10 mm	Altera Table 15; US 6,271,109 gives the same value
0.50 mm	0.08 mm	Altera Table 15; ADI ST-48 drawing note
0.40 mm	0.08 mm	ADI SU-64-1 drawing note, JEDEC MS-026-ABD
0.30 mm	0.05 mm	US 6,271,109, citing industry practice

Table 4. Published coplanarity limits across the full QFP pitch range

Note the shape of that curve. It flattens between 0.5 mm and 0.4 mm at 0.08 mm, then halves again by 0.3 mm. Suppliers hold 0.08 mm across the mainstream fine-pitch range because that is what the standard trim-and-form process delivers, not because 0.4 mm needs the same margin as 0.5 mm.

A separate limit applies above 208 pins regardless of pitch: Altera specifies 0.08 mm for QFPs of 208 pins or greater. On a large body, lead-tip deviation grows with distance from the package centre.

How Many Pins Each QFP Pitch Buys You

Only the perimeter carries leads, and the corners are unusable, so pin count follows from body edge and pitch. Pins per side runs at roughly 0.9 times the body edge divided by the pitch; multiply by four for the total.

Body edge	Pitch	Estimated pins	Real part at this combination
10 mm	0.80 mm	44	Altera 44-pin TQFP, 10 × 10 mm — exact
7 mm	0.50 mm	48	ADI ST-48 LQFP, 7 × 7 mm — exact
7 mm	0.40 mm	60	ADI SU-64-1 TQFP is 64 — estimate one pin per side low
14 mm	0.50 mm	100	Altera 100-pin TQFP, 14 × 14 mm — exact
20 mm	0.50 mm	144	Altera 144-pin TQFP, 20 × 20 mm — exact
28 mm	0.65 mm	154	Altera 160-pin PQFP, 28 × 28 mm — estimate low
28 mm	0.50 mm	200	Altera 208-pin PQFP, 28 × 28 mm — estimate low

Table 5. Estimated pin count by body size and pitch, checked against real parts

The estimator lands exactly on four of the seven and runs one to two pins per side conservative on the rest, because perimeter utilisation climbs with body size, from about 88% on a 10 mm body to 95% on a 40 mm one. Treat it as a floor, not a ceiling.

Use it the other way round when a part will not fit. Going from 0.5 mm to 0.4 mm pitch on a 14 mm body takes you from about 100 pins to about 124. Going from 14 mm to 20 mm at the same 0.5 mm pitch takes you from 100 to 144. The bigger body buys more pins than the finer QFP pitch does, and it costs far less process risk.

Choosing a QFP Pitch: A Decision Path

Pitch	Choose it when	Avoid it when	Real parts at this pitch
0.80 mm	Hand assembly, prototypes, education, or any board with no AOI and no SPI	You need more than about 60 pins on a small body	ATmega328P-AU, 32-TQFP 7 × 7 mm
0.65 mm	Moderate pin counts on a large body; wave or mixed process; IPC coarse-pitch fillet goals apply	Board area is tight; a 160-pin part needs a 28 mm body at this pitch	Altera 160-pin PQFP, 28 × 28 mm
0.50 mm	Standard reflow with SPI and AOI in the line; the default for 48 to 208 pin parts	You have no paste inspection and no vision placement	STM32F407ZET6 144-LQFP; Lattice iCE40HX4K-TQ144
0.40 mm	Pin count genuinely will not fit at 0.5 mm and the process is mature	You need a mask dam between pads, or the assembler has not run 0.4 mm before	ADI SU-64-1, 64-lead TQFP 7 × 7 mm

Table 6. When each QFP pitch is the right answer

The step from 0.5 mm to 0.4 mm is the expensive one. It buys 25% more pins on the same edge, and it costs you the mask dam, a thinner stencil, tighter placement dependence and a supplier conversation about coplanarity screening.

Before taking that step, run the pin-count check above in reverse. If one body size up gets you the pin count at 0.5 mm, take the board area instead.

What Goes Wrong at Each QFP Pitch

• At 0.8 and 0.65 mm: oversized pads are harmless, so the failures are usually handling. Leads at these pitches are stiff enough to survive tape, and coplanarity rejects are rare.
• At 0.5 mm: bridging from a footprint built with coarse-pitch fillet goals, and opens from paste starvation when a thinner foil was chosen for a neighbouring part.
• At 0.4 mm: bridging from mask dam failure, plus lead damage in handling. Leads below 0.65 mm pitch bend readily, which is why bumpered and guard-ring package variants exist.
• At every pitch: recirculated parts. A device the placement machine rejected for coplanarity, returned to the tray by an operator, will fail again on a later board.

One historical data point worth keeping in mind before declaring 0.4 mm exotic. Intel reported in 1994 that a 296-lead 0.4 mm pitch QFP in a 32 × 32 mm body assembled on the installed base of SMT equipment with little or no modification, at acceptable quality levels. The process has been possible for three decades; what it needs is control, not new machines.

Frequently Asked Questions

What is the standard QFP pitch?

There is no single standard. Common values are 1.0, 0.8, 0.65, 0.5, 0.4 and 0.3 mm, and 0.5 mm carries most of the volume in microcontrollers and low-density FPGAs. Pitch is a package attribute set by the supplier, so read it from the package outline drawing rather than assuming it from the pin count.

What is the smallest QFP pitch?

The practical floor for standard assembly is 0.4 mm. Below that, 0.3 mm parts exist but bridging losses climb sharply, and PCBCart places the format limit near 360 pins at 0.3 mm pitch. Most designs that need more density move to QFN or BGA instead.

What pad width should I use for a 0.5 mm pitch QFP?

Around 0.28 to 0.30 mm. NXP recommends 0.30 mm, about 60% of pitch. An IPC-7351 Level B calculation on a 48-lead LQFP with 0.17 mm minimum lead width gives 0.28 mm. Either leaves roughly a 0.20 to 0.22 mm copper gap between adjacent pads.

Is 0.4 mm pitch hard to solder?

It is manageable with process control, not exotic equipment. Intel demonstrated 0.4 mm pitch assembly on standard SMT lines in 1994. What changes is that you lose the solder mask dam between pads, the stencil is capped at about 130 µm, and placement tolerance consumes over a third of the copper gap.

Does QFP pitch affect the coplanarity requirement?

Yes, directly. Supplier limits run 0.10 mm at 0.65 mm pitch and coarser, 0.08 mm at 0.5 mm and 0.4 mm, and around 0.05 mm at 0.3 mm. A separate 0.08 mm limit applies to any QFP of 208 pins or more, whatever the pitch, because deviation grows with distance from the package centre.

What to Do Next

Read the pitch off the package drawing, then set four numbers from it before anything else: which IPC fillet goal table applies, the pad width, the stencil foil, and the coplanarity limit you will hold the supplier to. Those four follow from pitch alone and they are cheap to get right at schematic stage.

If the part is 0.5 mm or coarser, the standard process handles it and the footprint library will usually be correct. If it is 0.4 mm, talk to the assembler before you route: confirm the mask strategy, the stencil thickness on a mixed board, and whether they want incoming coplanarity data. And check once more whether a larger body at 0.5 mm gets you the same pin count. It frequently does.

Sources

• IPC-7351, Generic Requirements for Surface Mount Design and Land Pattern Standard, Tables 3-2 and 3-3 and the Fine-Pitch Technology definition; IPC-7525, Stencil Design Guidelines.
• Analog Devices package outlines ST-48 (48-lead LQFP, JEDEC MS-026-BBC, rev 01-17-2018-A) and SU-64-1 (64-lead TQFP, JEDEC MS-026-ABD).
• NXP (Freescale) AN4388, Quad Flat Package (QFP), rev. 2.0, February 2014: recommended pad widths as a function of lead pitch.
• Infineon, Recommendations for Board Assembly of Infineon Quad Flat Packages, revision 6.0, 12 November 2020: stencil thickness, paste type and placement accuracy.
• Toshiba, Package Mounting Guide SOP/QFP, revision 1.0, 17 March 2016: metal mask thickness.
• Altera Device Package Information, data sheet A-DS-PKG-09.1, May 2001, Table 15: maximum lead coplanarity by pitch and pin count.
• US Patents 6,271,109 and 7,462,943, both citing industry coplanarity practice at 1.0, 0.65 and 0.3 mm pitch.
• Intel, 296-lead fine pitch (0.4 mm) thin plastic QFP package with TAB interconnect, ECTC 1994.