A gull-wing lead exits the package body, bends down, then bends out flat against the board. That second bend is the whole point: it puts the foot on the land and leaves a compliant section that absorbs board expansion. Gull-wing leads are what SOIC, SOP, TSSOP, QFP and SOT parts use, and IPC judges their solder joints against six lettered dimensions. Those six, and the lead geometry that decides whether they are achievable, are below.
Key takeaways
- IPC-A-610 grades a gull-wing joint on six dimensions, A through F. The heel fillet carries most of the mechanical strength; the toe fillet is not required at all.
- Class 3 tightens two of the six: side overhang drops from 50% to 25% of lead width, and end joint width rises from 50% to 75%.
- Revision H changed the rules. Minimum heel fillet height no longer scales with lead thickness, and toe overhang now depends on whether the formed foot is at least three lead widths long.
- On an SOIC-8 with a 0.51 mm maximum lead width, three lead widths is 1.53 mm, which exceeds the 1.27 mm maximum foot length. That lead is a short foot.
- IPC-7351B files gull-wing components under two separate standards: IPC-7353 for two-sided parts and IPC-7355 for four-sided parts.
What is a gull-wing lead?
A gull-wing lead is a surface-mount lead formed in two bends so that it leaves the package body, descends, and flattens into a foot that sits on the board land. Viewed from the end it resembles a bird’s wing. The formed section between the body and the foot flexes, which lets the joint absorb expansion mismatch that a rigid termination would transfer straight into the solder.
[IMAGE 1: side-on macro of a soldered SOIC lead with the two bends, the foot, the heel fillet and the toe called out | alt: “Gull-wing lead cross-section showing the formed bends, foot, heel fillet and toe”]
The geometry that gets inspected
Take real numbers from a real drawing. Monolithic Power’s outline for the 8-lead SOIC, MF-PO-D-0018 revision 1.0, conforms to JEDEC MS-012 variation BA and gives the following.
| Feature | Min | Max |
| Lead width, W | 0.33 mm | 0.51 mm |
| Lead thickness, T | 0.19 mm | 0.25 mm |
| Formed foot length, L | 0.41 mm | 1.27 mm |
| Lead pitch | 1.27 mm BSC | 1.27 mm BSC |
| Standoff above the board | 0.00 mm | 0.15 mm |
| Lead exit angle | 0° | 8° |
| Coplanarity after forming | — | 0.10 mm |
| Gauge plane | 0.25 mm BSC | 0.25 mm BSC |
Table 1. Gull-wing lead geometry on an 8-lead SOIC, per MPS drawing MF-PO-D-0018 rev 1.0 (JEDEC MS-012 variation BA).
Two of those decide most inspection outcomes. Coplanarity is the flatness of the eight feet as a set: 0.10 mm of departure from a common plane is the limit after forming, and a single lifted foot beyond that will not reflow reliably no matter how good the paste is. The 0° to 8° exit angle is why a gull-wing foot lands flat rather than on an edge.
The six IPC dimensions, class by class
IPC-A-610 labels the gull-wing criteria A through F. The letters are consistent across revisions even where the values are not.
| Dimension | Class 1 | Class 2 | Class 3 |
| A, maximum side overhang | 50% of W, or 0.5 mm, whichever is less | 50% of W, or 0.5 mm, whichever is less | 25% of W, or 0.5 mm, whichever is less |
| B, maximum toe overhang | Permitted where minimum electrical clearance is maintained | Permitted only where the formed foot length is at least three lead widths | Permitted only where the formed foot length is at least three lead widths |
| C, minimum end joint width | 50% of W | 50% of W | 75% of W |
| D, minimum side joint length | Note per standard | For a long foot, three lead widths or 75% of the foot length, whichever is longer | Same as Class 2 |
| E, maximum heel fillet height | May extend through the top bend; must not touch the package body | Same | Same |
| F, minimum heel fillet height | Solder thickness + 50% of lead thickness | Solder thickness + 100% of lead thickness | Solder thickness + 100% of lead thickness |
Table 2. IPC-A-610 flat gull-wing acceptance criteria. See the revision warning below for row F.
The F row carries a revision warning. Sierra Circuits’ summary of the H revisions of IPC-A-610 and IPC-J-STD-001 states that minimum heel fillet height is no longer based on lead thickness, and that maximum toe overhang is now determined by lead length instead. If your inspection documents still quote solder thickness plus lead thickness, they are written to an earlier revision. Check which revision your customer flowed down before arguing about a joint.
The heel is the joint. The toe is not.
Notice what is missing from that table: there is no minimum toe fillet. Toe overhang is acceptable in Class 2 and 3 as long as electrical clearance holds and the foot is long enough, and no fillet is required at the toe at all.
The heel fillet does the work. It sits behind the bend, where the lead transitions from vertical to horizontal, and it is the feature that resists the cyclic stress the compliant section transmits. An inspector who checks side fillets and skips the heel is checking the wrong thing.
That is also why the solder must not climb into the package body. IPC-A-610 treats solder contacting the body as unacceptable regardless of class, and Chapter 8 material adds that solder should not extend under the body of surface-mount components whose leads are Alloy 42 or similar. Solder that reaches the body stiffens the compliant section and removes the reason for the gull-wing form.
[IMAGE 2: annotated inspection view of one gull-wing joint with the six IPC letters A to F placed on the features they measure | alt: “Gull-wing lead solder joint annotated with the six IPC-A-610 dimensions A to F”]
Worked example: can this land pattern hold Class 3?
Monolithic Power’s recommended land for that SOIC-8 is 1.60 mm long by 0.61 mm wide on 1.27 mm pitch. Test it against the Class 3 side overhang limit.
Lead width at maximum is 0.51 mm against a 0.61 mm land, so a perfectly centered lead has 0.05 mm of land showing on each side. Class 3 allows overhang up to 25% of lead width, which is 0.128 mm, since that is less than the 0.5 mm alternative. Total allowable placement error is therefore 0.05 + 0.128, or 0.177 mm before the joint becomes a Class 3 defect. Class 2 allows 50% of lead width, giving 0.305 mm.
Now compare against the errors the standards themselves assume. The IPC-7351 worked example for SOICs uses a fabrication tolerance of 0.1 mm and an assembly placement tolerance of 0.05 mm. Stacked worst case, that is 0.15 mm against a 0.177 mm allowance. Class 3 is achievable on this land pattern with about 0.027 mm of margin, and only if your placement machine actually holds 0.05 mm.
The same drawing produces a second result. Three lead widths at the 0.51 mm maximum is 1.53 mm, while the maximum formed foot length is 1.27 mm. A worst-case-width lead on this package is a short foot, so under the H revision toe overhang is not permitted for Class 2 or Class 3. The toe has to sit on the land, which the 1.60 mm land length comfortably allows.
Land patterns: the density level decides the fillet
IPC-7351B separates gull-wing components into two family standards, IPC-7353 for two-sided parts such as SOP, SOIC, SOD, SOT and TO, and IPC-7355 for four-sided parts such as QFP and CQFP. Both are published inside IPC-7351 rather than as separate documents.
Land size comes from the lead plus three solder fillet goals, written Jt for toe, Jh for heel and Js for side, plus fabrication tolerance. Pad length equals maximum lead length plus toe extension plus heel extension plus fabrication tolerance; pad width equals maximum lead width plus side extension plus fabrication tolerance.
| Density level | IPC name | Toe extension | Intended use |
| Most, Level A | Maximum land protrusion | 0.55 mm | Low density; suits wave or flow soldering of gull-wing devices, and hand rework |
| Nominal, Level B | Median land protrusion | 0.35 mm | Moderate density; the default for reflow production |
| Least, Level C | Minimum land protrusion | 0.15 mm | High density, portable and handheld; may not suit all use categories |
Table 3. IPC-7351B density levels and their toe extensions for gull-wing land patterns.
Pick the level before you pick the class. A Least land pattern shrinks the copper that side overhang is measured against, which makes the Class 3 arithmetic above tighter, not looser.
[IMAGE 3: the same SOIC lead drawn on Most, Nominal and Least land patterns side by side, with the side-overhang allowance shaded on each | alt: “Gull-wing lead on Most, Nominal and Least IPC-7351B land patterns with side overhang allowance”]
Design mistakes that cause returns
- Inspecting side fillets and skipping the heel. The heel carries the strength and is the criterion that fails first.
- Quoting a heel fillet rule that scales with lead thickness on a job flowed down to IPC-A-610H, where it no longer does.
- Choosing a Least density land pattern and then specifying Class 3, which leaves almost no placement margin.
- Assuming a toe fillet is required. It is not, on any class.
- Letting solder wick into the package body, which stiffens the compliant bend the package was designed around.
- Ignoring the 0.10 mm coplanarity limit when specifying reeled parts, then blaming paste volume for open joints.
Frequently asked questions
What is a gull-wing lead?
A surface-mount lead bent twice so it leaves the package, drops down, and flattens into a foot on the board land, resembling a bird’s wing from the side. The formed section flexes, absorbing thermal expansion mismatch between package and board. SOIC, SOP, TSSOP, QFP and SOT packages all use the form.
What is the difference between gull-wing and J-lead?
Direction of the second bend. A gull-wing foot points outward and sits on a land outside the package outline; a J-lead curls back underneath the body. Gull-wing joints are fully visible for optical inspection; J-lead joints partly hide beneath the part. J-leads take less board area.
How is a gull-wing solder joint inspected?
Against six IPC-A-610 dimensions: side overhang, toe overhang, end joint width, side joint length, and maximum and minimum heel fillet height. Class 3 tightens side overhang to 25% of lead width and end joint width to 75%. The heel fillet is the primary strength feature.
Does a gull-wing lead need a toe fillet?
No. IPC-A-610 sets no minimum toe fillet for gull-wing terminations in any class. Toe overhang is acceptable as long as electrical clearance is maintained and, in Class 2 and 3 under the H revision, the formed foot measures at least three lead widths.
What is coplanarity on a gull-wing package?
The maximum departure of any foot from the plane defined by the rest. Monolithic Power’s SOIC-8 drawing specifies 0.10 mm maximum after lead forming. A foot outside that tolerance sits above the paste and may not wet, producing an open joint that electrical test can miss.
What to do next
Before you release a footprint, run the arithmetic in the worked example above with your own part’s maximum lead width and your own land width. If the sum of your fabrication and placement tolerances leaves under about 0.03 mm of margin against the Class 3 side overhang limit, either widen the land or accept Class 2.
Then check which revision of IPC-A-610 your customer has flowed down, because the heel fillet and toe overhang rules moved in revision H. On a gull-wing lead the heel is what fails, so build the inspection plan around the criterion that changed.
Primary sources
- Monolithic Power Systems, 8-SOIC outline drawing MF-PO-D-0018 (JEDEC MS-012 variation BA) — https://media.monolithicpower.com/cms_document/Package%20Information/SOIC8%20EP%20POD.pdf
- IPC-A-610F table of contents, showing the lettered A–F gull-wing criteria — https://www.electronics.org/TOC/IPC-A-610F.pdf
- IPC-7351 table of contents and scope — https://www.electronics.org/TOC/IPC-7351.pdf
- Sierra Circuits, New H revisions of IPC-J-STD-001 and IPC-A-610 — https://www.protoexpress.com/blog/h-revisions-ipc-j-std-001-and-ipc-a-610-soldering-standards/
- Samtec, Understanding IPC Class 2 vs Class 3 for a gull wing lead — https://blog.samtec.com/post/understanding-ipc-class-2-vs-class-3-for-a-gull-wing-lead/
Proposed internal links
- [INTERNAL LINK: “J-lead packages and PLCC footprints” → PLCC package guide]
- [INTERNAL LINK: “SOIC-8 dimensions and land pattern” → SOIC package reference page]
- [INTERNAL LINK: “IPC-7351B density levels explained” → land pattern design guide]
- [INTERNAL LINK: “exposed-pad SOIC thermal design” → eSOP package reference page]
- [INTERNAL LINK: “stencil design and paste volume” → SMT assembly guide]
