A SIP package carries all its leads in one row along a single edge, so the body stands on end when the leads go through the board. That description covers resistor networks, isolated converter modules, reed relays, and filters. It does not cover System-in-Package, which shares the letters and nothing else. Both readings appear on page one for this query, so start by settling which one you have.

Key takeaways

• SIP (single in-line package) is a lead format. SiP (System-in-Package) is a multi-die integration technology. Capitalization is the only written clue.
• The number in SIP7 counts grid positions, not leads — Murata’s NMV1S0505SC is a 7-SIP module with four leads fitted, per its DigiKey listing.
• A 1 kVDC isolation rating on a SIP converter is a one-second production test, not a continuous working voltage.
• SIP saves board area against DIP and axial parts, not against modern chip resistors. The calculation is below.
• Two SIP7 converters with the same 19.5 mm body differ by 3× in isolation and by more than 2× in price, in opposite directions.

[IMAGE 1: an isolated SIP7 DC/DC converter module standing upright in a PCB beside a lying DIP-14, with body height and grid-position callouts | alt: “SIP package module standing vertically on a PCB next to a DIP for height comparison”]

What a SIP package is

A SIP package is a component whose leads all leave one edge of the body in a single row, normally on 2.54 mm centers, mounted through-hole so the body stands perpendicular to the board. The name describes the lead arrangement only. The contents may be resistors, a relay, a filter, or a complete power converter.

Pin counts in current catalogs run from three to fourteen. The format persists because a single row of leads is the cheapest interconnect a module can have, and because standing the body on edge trades board width for height.

SIP is not SiP: one acronym, two industries

Amkor Technology defines advanced SiPs as multi-component, multi-function products inside one IC package, assembled with double-sided placement, molding, and conformal shielding, down to 008004 passives (Amkor SiP technology sheet TS101T-EN, Rev 02/22). Nothing in that description involves a row of through-hole leads.

The distinction matters at the point of ordering. Filter a distributor catalog for “SIP” and you get through-hole modules; search a foundry or OSAT site for “SiP” and you get laminate substrates and RF shielding. Capitalization of the middle letter is the only convention separating them, and it is not applied consistently.

Practical rule: if the part has a package drawing with a lead pitch, it is a single in-line package. If it has a substrate stack-up and a die placement map, it is System-in-Package.

Reading the name: SIP-7, HSIP, P-SIP, ZIP, SIPP

The prefixes and suffixes carry real information, and one of them is a footprint trap.

Designation	Meaning	Consequence for the board
SIP-n	n positions on the lead grid	Not necessarily n leads — see below
HSIP	SIP with an integral heat sink or tab	Adds mounting hardware and clearance
P-SIP	Plastic body SIP	Sets the solder profile ceiling
ZIP	Zig-zag in-line, staggered leads	Halves visible lead spacing at the same insertion grid
SIPP	Single in-line pin package, the 30-pin memory format	Legacy only; displaced by edge-connector SIMMs
SiP	System-in-Package	A different technology entirely

Murata’s NMV1S0505SC is listed by DigiKey as a 7-SIP module with 4 leads. Seven positions are defined on the 2.54 mm grid; four are populated. Draw the footprint from the package drawing, not from the package name, or you will place three holes with nothing to fill them and lose the mechanical anchor you thought you had.

SIPP is the cautionary entry in that table. The 30-pin memory variant put a full memory bus on one lead row, and it lost to edge-connector SIMMs, which proved cheaper and more durable in service. High lead counts on a single row remain a poor connector.

What ships in a SIP package today

Part	Function	Positions × pitch	Body L × W × H (mm)	Key ratings	Source
Murata NMA0505SC	Isolated dual-output DC/DC, 1 W	SIP7	19.5 × 6.0 × 10.0	4.5–5.5 V in, ±5 V at ±100 mA, 1 kVDC isolation, 69 % efficiency, −40 to +85 °C	Murata product data
Murata NMV1S0505SC	Isolated single-output DC/DC, 1 W	7-SIP, 4 leads	19.5 × 6.0 × 10.0	5 V at 200 mA, 3 kV isolation, 67 % efficiency, −40 to +115 °C with derating, cURus to IEC 62368-1	DigiKey listing
Bourns 4608X-101-472LF	Bussed thick-film resistor network	8 × 2.54 ± 0.07 mm	20.27 × 2.49 × 5.08 max	7 elements, 4.7 kΩ ±2 %, 1.00 W package at 70 °C, 100 V max	4600X REV. 10/1/20
Pickering 113-1-A-5/2D	Reed relay, 1 Form A	4 × 2.54 mm	12.5 × 3.7 × 6.6	10 W, 0.5 A, 200 V max switching, 5 V/500 Ω coil	Series 113 Issue 1.3
NXP SOT1188-3	Molded semiconductor package	4 × 1.8 mm	11.0 × 7.4 × 1.95	Plastic, through-hole; type code SIL4, style code SIP	SOT1188-3, 5 May 2022

NXP’s drawing is worth noting for anyone reconciling two datasheets: the same part carries SIL4 as the package type code and SIP as the package style code. The names are interchangeable at the manufacturer level.

[INTERNAL LINK: SIL package single in-line lead format -> SIL package footprint and circuit-code guide]

Isolation ratings on SIP modules: what 1 kV actually buys

Murata production-tests the NMA series at its stated isolation voltage, 1 kVDC for one second, and states in its application material that the figure measures immunity to transients rather than a continuous rating. For a part holding no agency approval, both sides should stay within SELV limits — under 42.4 V peak or 60 VDC — and the module must never serve as an element of a safety isolation system.

Read that twice before designing an NMA-class module into a mains-referenced interface. The part will hold several hundred volts of continuous offset and keep working, but the circuits on both sides then count as hazardous, and a separate insulation system has to stand between them and anything a user can touch.

Where the barrier does carry a safety function, buy the approval rather than the test voltage. The NMV1S0505SC is listed at 3 kV isolation with cURus approval to IEC 62368-1, a different class of claim from a one-second dielectric test.

[IMAGE 2: an isolation barrier diagram distinguishing a one-second dielectric test voltage from a continuous working voltage under SELV limits | alt: “SIP package converter isolation test voltage versus continuous working voltage”]

Standing a package on edge: height, thermal, and mechanical cost

Every claim that a SIP package saves board area needs a reference point. Against a DIP or an axial resistor string, it does. Against chip resistors, it does not.

Take the Bourns 4608X-101, seven bussed elements in a body 20.27 mm long by 2.49 mm thick at maximum. Body area on the board is:

20.27 mm × 2.49 mm ≈ 50.5 mm²

Eight discrete 0603 resistors, using a nominal land pattern outline of roughly 2.6 mm × 1.4 mm each, occupy about 29 mm² in total, and that figure is generous, since it ignores the shared bus the network provides internally. The network is larger in plan area, and 5.08 mm taller.

What the SIP buys instead is one placement instead of eight, one BOM line, one inspection point, and matched elements from a single firing. On a through-hole board it also buys the only option available. On a dense SMT board it costs area.

Insertion depth matters more than on a flat package. The part is correctly seated only when every lead is through and the lead standoff step rests against the lands. A body left proud tilts under wave solder and loads the joints off-axis.

Three consequences follow from the vertical body:

• Height budget. A SIP7 converter stands 10.0 mm above the seating plane before lead standoff. Check enclosure and board-to-board clearance early.
• Thermal path. The body couples to the board only through one row of leads, so copper spreading does little. Module derating curves, not board copper, set the usable power.
• Mechanical anchor. One lead row resists bending far worse than two. Shock and vibration loads reach the solder joints directly; tall parts need bonding or bracing.

Socketing a SIP: what the receptacle accepts

Machined single-row sockets exist on the same 2.54 mm grid, but they are specified for pins, not for stamped leads. Mill-Max Series 801 single-row sockets use the MM #1304 receptacle with a six-finger beryllium copper contact rated at 4.5 A, and the drawing specifies acceptance of 0.030 in diameter round or 0.025 in square pins.

Now measure a Bourns 4600X lead: 0.50 mm by 0.254 mm, which is 0.020 in by 0.010 in. That flat lead sits below the specified acceptance range in both dimensions. It will enter the receptacle and it may make contact, but contact force is outside what the socket was characterized for.

Socket module-style SIPs with round or square pins. Solder flat-lead networks directly, or qualify the retention with the socket manufacturer before committing.

[IMAGE 3: cross-section of a machined SIP socket receptacle contact against a round pin and against a flat stamped lead | alt: “SIP package socket receptacle contact with round pin versus flat network lead”]

[INTERNAL LINK: through-hole component sockets and receptacles -> socketing guide]

Cost, agency approval, and lifecycle

Two Murata modules in the same SIP7 body make the point that package identity says nothing about commercial position.

Attribute	NMA0505SC	NMV1S0505SC
Outputs	Dual, ±5 V at ±100 mA	Single, 5 V at 200 mA
Isolation	1 kVDC, one-second test	3 kV
Agency	None stated	cURus, IEC 62368-1
Operating range	−40 to +85 °C	−40 to +115 °C with derating
DigiKey unit price, qty 1	$5.08	$1.95
Stock and lead time	Stocked	1,669 in stock, 10-week standard manufacturer lead time

The cheaper part has triple the isolation, an agency approval, and a wider temperature range. Price on this format tracks production volume and vintage, not capability, so run the comparison per project rather than trusting a familiar part number.

For lifecycle, check the pin-count variant rather than the series. Odd positions and legacy tin-lead terminations go non-stocked long before the family is discontinued, and a 10-week standard lead time is normal even for an active, well-stocked part.

[INTERNAL LINK: component lifecycle and second-source qualification -> obsolescence management]

SIP package FAQ

What does SIP stand for in electronics?

SIP stands for single in-line package: a component with all leads in one row along one edge, normally through-hole on 2.54 mm centers. The same format is written SIL in European datasheets. NXP’s SOT1188-3 drawing uses both, listing SIL4 as the type code and SIP as the style code.

What is the difference between SIP and SiP?

SIP is a through-hole lead format. SiP means System-in-Package: multiple dies and passives integrated into one module, which Amkor describes as multi-component, multi-function products in an IC package. They share letters and nothing else. Only the lowercase i distinguishes them in writing.

What does the number in SIP-7 mean?

It counts positions on the lead grid, not populated leads. Murata’s NMV1S0505SC is listed as a 7-SIP module with four leads fitted. Take hole positions from the package drawing rather than the package name, or the footprint will carry unused holes.

Is SIP the same as SIL?

Yes, for the lead format. SIL is single in-line, SIP is single in-line package, and manufacturers use both for the same body. Regional preference decides which appears: SIL is more common in European catalogs and distributor listings, SIP in US and Japanese datasheets.

What is a SIP resistor network used for?

Pull-ups, pull-downs, bus termination, LED current limiting, and voltage dividers where several elements share a value. One body replaces several placements and holds the elements to a common tolerance. The Bourns 4608X-101, for example, packs seven bussed 4.7 kΩ elements into 20.27 mm.

Is a SIP package through-hole or surface mount?

Through-hole by default; NXP classifies SOT1188-3 as through-hole mount. Surface-mount variants of the same format exist, including Bourns’ 4300 and 4600 H, M, and R profiles. Check the mounting method field on the package drawing rather than assuming from the name.

What to do next

Confirm which SIP you have before anything else. A package drawing with a lead pitch means single in-line; a substrate stack-up means System-in-Package, and none of the guidance above applies.

For a converter module, treat the isolation number as a test result, not a rating. Specify an agency-approved part whenever the barrier does safety work, and check that the approved part is not, as here, also the cheaper one.

For a passive network on an SMT board, run the area comparison against chip resistors before assuming the SIP saves space. Choose it for placement count, matched tolerance, and through-hole compatibility, the three things it genuinely wins on.

[IMAGE 4: SIP7 grid positions with populated and unpopulated lead locations marked on a footprint | alt: “SIP package footprint showing grid positions versus populated leads”]

Primary sources

• Murata NMA0505SC product data — https://www.murata.com/en-us/products/productdetail?partno=NMA0505SC
• Murata NMA series isolation application note — https://www.murata.com/products/productdata/8807031013406/kdc-nma.pdf
• DigiKey listing, Murata NMV1S0505SC — https://www.digikey.com/en/products/detail/murata-power-solutions-inc/NMV1S0505SC/21410550
• Mill-Max Series 800/801 single-row headers and sockets — https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/2367/800, 801 Series (in.).pdf
• NXP SOT1188-3 package information, 5 May 2022 — https://www.nxp.com/docs/en/package-information/SOT1188-3.pdf
• Bourns 4600X Series datasheet, REV. 10/1/20 — https://www.bourns.com/docs/Product-Datasheets/4600x.pdf
• Amkor System in Package technology sheet, TS101T-EN Rev 02/22 — https://amkor.com/packaging/system-in-package/