DIP pin spacing follows one universal rule and three row-width standards. Every standard DIP package uses a 2.54 mm (0.1” / 100 mil) center-to-center pitch between adjacent pins in each row. The distance between the two rows—the row spacing or row width—varies by pin count: 300 mil (7.62 mm), 400 mil (10.16 mm), or 600 mil (15.24 mm). These dimensions are defined by JEDEC standards MS-001, MS-010, and MS-011 respectively. This guide covers every DIP spacing dimension you need for PCB footprint design, socket selection, and breadboard compatibility.
Key Takeaways
Pin pitch is always 2.54 mm (100 mil) for standard DIP. This matches solderless breadboard hole spacing. The only exception is Shrink DIP (SDIP), which uses 1.778 mm (70 mil) pitch.
Three standard row spacings exist: 300 mil (7.62 mm) per JEDEC MS-001, 400 mil (10.16 mm) per MS-010, and 600 mil (15.24 mm) per MS-011. A fourth—900 mil (22.86 mm)—appears in some ceramic DIP variants under MS-015.
Row spacing determines which JEDEC standard applies and which pin counts are available. Choosing the wrong row width in your PCB footprint library is a common cause of assembly failures.
DIP Pin Spacing Reference Table
| JEDEC Standard | Row Spacing (mil) | Row Spacing (mm) | Body Width (mm) | Pin Counts Available | Designation Example |
| MS-001 | 300 | 7.62 | 6.35 (0.25”) | 4, 8, 14, 16, 18, 20, 24, 28 | DIP14N, DIP28N |
| MS-010 | 400 | 10.16 | 9.15 (0.36”) | 22 | DIP22 |
| MS-011 | 600 | 15.24 | 12.7 (0.50”) | 24, 28, 32, 36, 40, 48, 52, 64 | DIP40W, DIP64W |
| MS-015 (CDIP) | 300–900 | 7.62–22.86 | varies | 8–64 | CDIP40 |
| SDIP (vendor) | 300 | 7.62 | ~5.08 | 14–90 | SDIP64 |
Sources: JEDEC JEP-95 package outline index, PCB-3D JEDEC outlines, GoElectronic DIP reference. All row spacings are measured center-to-center between the two pin rows. “N” suffix = narrow (300 mil); “W” suffix = wide (600 mil).
[IMAGE 1: Dimensioned top-view diagram of a DIP-14 (300 mil) and DIP-40 (600 mil) showing pin pitch, row spacing, body width, and pin numbering | alt: “DIP pin spacing diagram showing 2.54 mm pitch and 300 mil versus 600 mil row widths”]
Pin Pitch: 2.54 mm (100 mil)
The 2.54 mm pin pitch is the center-to-center distance between any two adjacent pins in the same row. This dimension is fixed across all standard DIP variants—PDIP, CDIP, Skinny DIP—and is the reason DIP ICs fit directly into standard solderless breadboards, which use the same 0.1” grid.
Former Soviet and Eastern European DIP packages use a metric pitch of 2.50 mm instead of the imperial-derived 2.54 mm. The 0.04 mm difference is small enough that most sockets tolerate both, but for tight-tolerance PCB footprints, verify which standard applies to your component.
Shrink DIP (SDIP) reduces the pitch to 1.778 mm (70 mil), achieving roughly 40% higher linear pin density. SDIP is not breadboard-compatible and requires its own footprint. Pin counts up to 64 are common in SDIP; some variants reach 90 pins.
Row Widths: 300, 400, and 600 mil
300 mil (7.62 mm) — JEDEC MS-001
The 300 mil row spacing is the most common DIP configuration. It covers pin counts from 4 to 28. The body width (measured across the plastic/ceramic, not the pin tips) is 6.35 mm (0.25”) per PCB-3D. Maximum body height above the seating plane is 0.53 mm (0.21”). A 300 mil DIP straddles the center channel of a standard breadboard, with each row of pins inserting into separate 5-hole columns.
400 mil (10.16 mm) — JEDEC MS-010
The 400 mil row spacing is uncommon and covers primarily 22-pin DIP packages. Body width is 9.15 mm (0.36”). This spacing exists because 22 pins at 300 mil would make the package too long for some board layouts, while 600 mil would waste space. Few modern ICs use this configuration. When encountered, it typically appears in legacy industrial control and instrumentation ICs.
600 mil (15.24 mm) — JEDEC MS-011
The 600 mil row spacing accommodates higher pin counts: 24 through 64 pins. Body width is 12.7 mm (0.50”). Maximum body height is 0.635 mm (0.25”) per PCB-3D. A 600 mil DIP does not fit across a standard breadboard center channel—it requires two breadboards side by side or a wide-format prototyping board. Classic examples include the Motorola 68000 (DIP-64W) and the Intel 8086 (DIP-40W).
900 mil (22.86 mm) — JEDEC MS-015
A 900 mil row spacing appears only in certain ceramic DIP (CDIP) packages under JEDEC MS-015. It is used for high-pin-count military and aerospace ICs where the ceramic body needs additional width for internal routing layers or larger die cavities. This is rare in current production.
PCB Footprint Design Rules for DIP Pin Spacing
When designing a DIP footprint, the critical dimensions are:
Hole-to-hole pitch along each row: 2.54 mm (100 mil) center-to-center. Place holes on a standard 100 mil grid.
Row-to-row distance: Match the JEDEC standard—300, 400, or 600 mil—measured center-to-center between the two rows of holes. Mismatching this dimension is the number-one footprint error for DIP components.
Drill hole diameter: IPC-7253 (the DIP sub-standard of IPC-7251) recommends finished hole = max lead width + 0.20 to 0.35 mm. For a typical PDIP lead of 0.56 mm max width, this gives a 0.76–0.91 mm finished hole.
Pad (land) diameter: Hole diameter + 1.2 to 1.6 mm (depending on IPC producibility level). For a 0.80 mm hole, Level B gives a 2.20 mm pad.
Courtyard: Extends 0.5–1.0 mm beyond the outermost pad edge, depending on density level.
[IMAGE 2: PCB footprint diagram for DIP-16 (300 mil) showing drill holes on 2.54 mm grid, row spacing, pad diameters, and courtyard boundary | alt: “DIP pin spacing PCB footprint layout showing drill holes pad sizes and courtyard”]
Frequently Asked Questions
What is the pin spacing of a DIP package?
Standard DIP pin spacing (pitch) is 2.54 mm (0.1 inch / 100 mil) between adjacent pins in each row. This is constant across all standard DIP variants. The row-to-row spacing varies: 300 mil (7.62 mm), 400 mil (10.16 mm), or 600 mil (15.24 mm) depending on pin count and JEDEC standard.
Do DIP packages fit on a breadboard?
Yes—300 mil (narrow) DIP packages fit directly across the center channel of a standard solderless breadboard. The 2.54 mm pin pitch matches breadboard hole spacing exactly. 600 mil (wide) DIP packages are too wide for standard breadboards and require a wide-format prototyping board.
What is the difference between narrow and wide DIP?
Narrow DIP has a 300 mil (7.62 mm) row spacing and covers pin counts up to 28 (JEDEC MS-001). Wide DIP has a 600 mil (15.24 mm) row spacing and covers 24–64 pins (JEDEC MS-011). The pin pitch (2.54 mm) is the same for both. Narrow is labeled with an “N” suffix; wide with a “W” suffix.
What pitch does Shrink DIP use?
Shrink DIP (SDIP) uses a reduced pitch of 1.778 mm (70 mil, or 0.07”) instead of the standard 2.54 mm. This achieves approximately 40% more pins per linear length. SDIP is not breadboard-compatible and is not covered by a single JEDEC standard—it is vendor-specific.
Getting the Spacing Right
Confirm two dimensions before placing a DIP footprint: the pin pitch (2.54 mm unless SDIP) and the row width (300, 400, or 600 mil). Check the JEDEC standard suffix on the part’s datasheet—MS-001 for narrow, MS-011 for wide. If the component datasheet specifies a package drawing, use that drawing’s exact dimensions rather than relying on generic library footprints. A 0.3 mm error in row spacing will prevent insertion.
