The LQFP-100 package is a 100-lead plastic quad flat pack with gull-wing leads on all four sides, a 1.40 mm body and a 1.60 mm maximum seated height. The dominant outline is a 14 × 14 mm body on 0.50 mm pitch, giving a 16.0 × 16.0 mm lead span. What follows is the mechanical envelope, the pin-numbering rule, a land pattern you can build from, and the assembly failures this package actually produces.

Key takeaways

• The dominant LQFP-100 outline is a 14 × 14 mm body on 0.50 mm pitch: 16.0 mm lead span, 1.40 mm body thickness, 1.60 mm maximum height, per the JEDEC MS-026 family drawing.
• A 12 × 12 mm, 0.40 mm pitch 100-lead quad flat variant also ships in volume. Its footprint is not interchangeable with the 0.50 mm part — read the pitch before you place the symbol.
• LQFP and TQFP differ in body thickness only: 1.40 mm against 1.00 mm. Same pitch and span means the same land pattern, but standoff and total height change.
• Start the footprint from IPC-7351B QFP50P1600X1600X160-100N: 0.30 mm × 1.50 mm lands, 16.90 mm toe-to-toe, 17.40 mm courtyard.
• A 1.40 mm body sits under the 1.60 mm threshold in J-STD-020, so the classification reflow peak is 260 °C. Most LQFP-100 MCUs ship at MSL 3, a 168 h floor life at ≤ 30 °C / 60 % RH.
• Every lead is on the package perimeter, so all 100 nets escape on two layers. That single property is why this package still beats a 0.80 mm BGA on low-cost boards.

What the LQFP-100 package is

LQFP-100 means Low-profile Quad Flat Package with 100 leads. The leads exit all four sides as gull wings, 25 per side. The JEDEC MS-026 outline fixes the body thickness at 1.40 mm and the maximum overall height at 1.60 mm. The common body is 14 × 14 mm on 0.50 mm pitch.

The “low profile” label is a height class, not a pin count. MS-026 covers bodies from 4 mm to 24 mm and pitches from 0.40 mm to 0.80 mm, so LQFP-32, LQFP-64, LQFP-100 and LQFP-144 all share the same thickness rules and differ only in body size and pitch.

LQFP-100 sits in a useful gap. It carries more I/O than a 64-lead part, keeps every connection on the outside of the body, and needs no X-ray to inspect. A 100-ball TFBGA occupies roughly a third of the board area but forces a 4-layer stack-up and blind inspection.

[IMAGE 1: Isometric render of a 14 × 14 mm LQFP-100 body with the pin-1 chamfer and dimple called out | alt: “LQFP-100 package body showing pin 1 index and gull-wing leads on all four sides”]

LQFP-100 dimensions

The table below gives the nominal envelope for the 14 × 14 mm, 0.50 mm pitch variant. Treat these as typical values from the MS-026 family drawing; the controlling numbers for your build are in the package section of the specific device datasheet.

Table 1 — LQFP-100 mechanical envelope, 14 × 14 mm body, 0.50 mm pitch (typical)

Parameter	Symbol	Typical value	Notes
Body size	D × E	14.00 × 14.00 mm	Square body, plastic moulded
Lead count	—	100	25 leads per side
Lead pitch	e	0.50 mm	Basic dimension, no tolerance
Lead span, tip to tip	HD × HE	16.00 × 16.00 mm ± 0.20 mm	Body + 2 × 1.00 mm lead reach
Body thickness	A2	1.40 mm ± 0.05 mm	The dimension that makes it “low profile”
Overall height	A	1.60 mm max	Seated height including standoff
Standoff	A1	0.05 mm min, 0.15 mm max	Gap under the body after reflow
Lead width	b	0.22 mm (0.17–0.27 mm)	Measured at the gauge plane
Lead thickness	c	0.127 mm (0.09–0.20 mm)	Copper alloy plus finish
Foot length	L	0.60 mm (0.45–0.75 mm)	Drives heel and toe fillet targets
Foot angle	θ	0° to 7°	Affects heel fillet formation
Coplanarity	—	0.08 mm max	Out-of-spec leads cause open joints
Pin 1 index	—	Corner chamfer plus moulded dimple	Chamfer alone is not a reliable index

Two numbers do most of the work in a layout review. The 16.00 mm span sets the toe-to-toe land dimension, and the 0.45 mm minimum foot length sets how much land you must keep inboard for a heel fillet. Everything else follows.

The second body size to know is 12 × 12 mm on 0.40 mm pitch, also with 100 leads. Microchip ships PIC32 devices in that outline as a 100-pin TQFP. Nothing about that footprint transfers to a 0.50 mm part, and the two symbols look identical in a schematic library.

LQFP-100 against the alternatives

The comparison worth making is not LQFP versus QFP in the abstract. It is which 100-net package costs least to build on your stack-up.

Table 2 — 100-lead package options compared

Package	Body (mm)	Pitch (mm)	Max height (mm)	Min layers to escape	Where it wins
LQFP-100	14 × 14	0.50	1.60	2	Low-cost boards, hand rework, optical inspection
TQFP-100	14 × 14	0.50	1.20	2	Height-limited enclosures, same land pattern
TQFP-100 (fine pitch)	12 × 12	0.40	1.20	2	Board area, at the cost of tighter fab rules
LQFP-144	20 × 20	0.50	1.60	2	More I/O when area is free
TFBGA-100	8 × 8	0.80	1.20	4	Board area and signal integrity, needs X-ray

LQFP and TQFP names cause more confusion than any other detail on this package. The pitch and span are identical, so the land pattern is identical. The body thickness differs by 0.40 mm, which changes standoff, warpage behaviour and total stack height. Swapping one for the other is a mechanical change, not a footprint change.

LQFP-100 pinout and pin numbering

Pin numbering runs counter-clockwise when the package is viewed from the top, starting at the corner marked by the moulded dimple. That single rule fixes the whole map.

Table 3 — LQFP-100 pin allocation by side, top view

Side	Pin range	Direction of count	Corner pins
Left	1 to 25	Top to bottom	Pin 1 at top-left
Bottom	26 to 50	Left to right	Pin 26 at bottom-left
Right	51 to 75	Bottom to top	Pin 51 at bottom-right
Top	76 to 100	Right to left	Pin 76 at top-right

Function assignment is entirely vendor-specific. There is no standard LQFP-100 pinout, and two 100-lead microcontrollers from the same vendor rarely match. Supply and ground pins are usually distributed to keep the current loop short on every side, which is why the decoupling plan has to follow the pinout rather than the schematic sheet order.

Devices commonly offered in a 100-lead quad flat outline include the STM32F103VCT6 and STM32F407VGT6, the NXP LPC1768FBD100, the Intel MAX II EPM240T100C5N and the Lattice MachXO2 LCMXO2-1200HC-4TG100C. Confirm the package drawing in each datasheet before committing a footprint; suffix letters, not marketing names, identify the outline.

[IMAGE 2: Top-view pinout diagram of an LQFP-100 with pin 1 dimple and the four 25-pin side groups labelled | alt: “LQFP-100 pinout diagram showing counter-clockwise pin numbering from pin 1”]

LQFP-100 PCB footprint and land pattern

The IPC-7351B name for the standard footprint is QFP50P1600X1600X160-100N. Read it as: quad flat pack, 0.50 mm pitch, 16.00 × 16.00 mm span, 1.60 mm height, 100 pins, nominal density.

IPC-7351B builds the land from three fillet targets — toe, heel and side — that change with density level. Level A is for low-volume or high-reliability builds with wave or manual rework. Level B is the default for reflow assembly. Level C is for high-density boards where area is the binding constraint.

Table 4 — IPC-7351B land pattern for LQFP-100, by density level (computed from the nominal envelope)

Density level	Toe fillet (mm)	Heel fillet (mm)	Land size (mm)	Toe-to-toe span (mm)
A — most material	0.55	0.45	0.32 × 1.75	17.30
B — nominal	0.35	0.35	0.30 × 1.50	16.90
C — least material	0.15	0.25	0.28 × 1.25	16.50

For density level B the inner edge of the land sits at a 13.90 mm gap, the land is 1.50 mm long, and the courtyard is 17.40 mm square after adding the 0.25 mm courtyard excess. Regenerate these in your library tool against the real datasheet before release, because the foot length tolerance moves the heel more than any other input.

Solder mask needs a decision at 0.50 mm pitch. Non-solder-mask-defined lands with 0.05 mm mask expansion leave a web of about 0.10 mm between adjacent openings, which is at or below the minimum web width many fabs will guarantee. The usual answer is a single ganged mask opening over each 25-land row. That works, but it removes the mask dam that limits bridging, so paste volume then has to carry the whole burden.

Keep the silkscreen pin-1 marker outside the courtyard. A dot printed inside the 17.40 mm courtyard disappears under the body and stops being an inspection aid.

Stencil design: a worked area-ratio check

Fine-pitch release is a geometry problem, not a paste problem. The area ratio — aperture opening area divided by aperture wall area — has to clear 0.66 for reliable transfer.

Take a 0.28 mm × 1.40 mm aperture, which is the density level B land reduced 7 % in width and 10 % in length, on a 0.127 mm laser-cut foil:

• Opening area = 0.28 × 1.40 = 0.392 mm²
• Wall area = 2 × (0.28 + 1.40) × 0.127 = 0.427 mm²
• Area ratio = 0.392 / 0.427 = 0.92

That clears the threshold with margin. Move to a 0.150 mm foil and the ratio falls to 0.78, still acceptable, but deposited paste volume rises about 18 % on a pitch where the mask dam may already be gone. On LQFP-100 rows, 0.100 mm to 0.127 mm foil is the working range.

Reducing aperture length rather than width is the right lever. Width reduction attacks the heel fillet, which is the joint feature that carries thermal cycling load.

Thermal behaviour and a worked junction-temperature check

A standard LQFP-100 has no exposed pad. Heat leaves through 100 leads into the board, which makes θJA almost entirely a property of your copper, not the package.

Typical published figures for a 14 × 14 mm LQFP-100 run 45 °C/W to 55 °C/W on the JESD51-7 four-layer test board and 60 °C/W to 75 °C/W on the JESD51-3 single-layer board. That spread is the whole design margin.

Work an example. A microcontroller drawing 150 mA at 3.3 V dissipates 0.50 W. On a four-layer board at 50 °C/W the junction rises 25 °C. At an 85 °C ambient the junction sits at 110 °C against a 125 °C limit, leaving 15 °C.

Move the same part to a two-layer board at 70 °C/W and the rise becomes 35 °C, putting the junction at 120 °C. Five degrees of margin will not survive a stalled fan, a sunlit enclosure or a part at the top of its leakage distribution.

The lever that works is copper under the body. A continuous ground pour on layer 2 across the full 17.40 mm courtyard, tied with vias just outside the land rows, moves θJA further than any change to the package.

Reflow, moisture and assembly limits

J-STD-020 classifies by body thickness first. At 1.40 mm the LQFP-100 falls below the 1.60 mm threshold, so the classification peak temperature is 260 °C regardless of package volume. Time above 217 °C should stay in the 60 s to 150 s band.

Moisture sensitivity level 3 is the common rating for 100-lead plastic quad flat packages, giving a 168 h floor life at 30 °C and 60 % RH after the dry bag opens. Past that, bake before reflow — J-STD-033 gives 24 h at 125 °C for this body class. Skipping the bake on a package this wide is how popcorn cracking gets into a build.

Three defects dominate on this package:

• Bridging across the 0.50 mm pitch, usually from excess paste volume once the mask dam is ganged away.
• Open joints at one or two leads, traced to coplanarity outside 0.08 mm after tape-and-reel handling or manual straightening.
• Insufficient heel fillet, caused by aperture width reduction rather than length reduction, which passes optical inspection and fails thermal cycling.

Escape routing and layout

Count the routing budget before choosing the package. Four sides at 16.0 mm give 64 mm of perimeter for 100 leads, or 0.64 mm of channel per net. Even at conservative 0.15 mm trace and space rules there is room to fan every lead outward without a via.

That is the structural advantage over any BGA. All 100 nets escape on the outer layers, so a two-layer board is viable, and every joint is visible to an operator with a microscope.

Decoupling follows the pinout. Place one 100 nF 0402 per supply pin pair on the same side of the board as the device, with the ground via inside 1.5 mm of the capacitor pad. Routing supply pins back to a shared bulk capacitor across the body defeats the point of the distributed supply pins.

Leave the region under the body free of layer 1 traces where you can. It is the only place a solid return path can sit directly beneath 100 signal escapes.

Sourcing, lifecycle and compliance

LQFP-100 is a mature outline with deep second-source coverage. The same die is often offered in LQFP-100, TQFP-100 and a TFBGA, so a package change is usually available without a silicon requalification — but the ordering suffix changes, and so does the reel.

Check three things at sourcing. First, the package suffix maps to the drawing you footprinted. Second, the automotive grade you need actually exists in this outline, since AEC-Q100 qualification is per part and per package. Third, the RoHS and REACH declarations are current for the specific orderable, not the family.

Counterfeit exposure is real on this package. The top surface is large, flat and easy to re-mark, and 100-lead MCUs from allocation-era shortages still circulate. Compare laser mark depth and font against a known-good unit, check date code consistency across the reel, and reject any part with visible lead re-forming.

Design mistakes that cause returns

• Placing a 0.40 mm pitch 100-lead part on a 0.50 mm pitch footprint. The symbol looks right and the part sits on the pads at one corner.
• Copying a land pattern from a vendor application note without checking which density level it used. Level C on a hand-reworked prototype gives no toe fillet to inspect.
• Ganging the solder mask and keeping the full 1:1 stencil aperture. Both dams are then gone.
• Specifying θJA from a four-layer datasheet figure and building on two layers.
• Putting the pin-1 silkscreen marker inside the courtyard, where the body covers it.
• Treating LQFP and TQFP as interchangeable in a height-constrained enclosure. The 0.40 mm difference is the whole clearance budget on some designs.

Frequently asked questions

What does LQFP-100 stand for?

Low-profile Quad Flat Package with 100 leads. “Low profile” is a JEDEC height class meaning a 1.40 mm body and a 1.60 mm maximum seated height. “Quad flat” means gull-wing leads on all four sides. The 100 is the lead count, 25 per side.

What is the size of an LQFP-100 package?

The common variant has a 14 × 14 mm body and a 16.0 × 16.0 mm lead span on 0.50 mm pitch, standing 1.60 mm tall at maximum. A 12 × 12 mm body on 0.40 mm pitch also exists with the same 100 leads. The footprints are not interchangeable.

Is LQFP-100 the same as TQFP-100?

Not quite. Pitch, span and land pattern are identical, so the footprint transfers directly. The body thickness differs: 1.40 mm for LQFP against 1.00 mm for TQFP, with maximum heights of 1.60 mm and 1.20 mm. Treat the swap as a mechanical change and recheck enclosure clearance.

Can you hand-solder an LQFP-100?

Yes. At 0.50 mm pitch, drag soldering with flux and braid is routine bench work, and every joint stays visible for inspection. That is a genuine advantage over a BGA. Expect to rework one or two bridges per part and check the heel fillets under magnification afterwards.

What land pattern should I use for an LQFP-100?

Start from IPC-7351B QFP50P1600X1600X160-100N at density level B: 0.30 mm × 1.50 mm lands on 0.50 mm pitch, 16.90 mm toe-to-toe, 17.40 mm courtyard. Move to level A for hand rework or high-reliability builds. Regenerate against the datasheet before release.

What is the maximum reflow temperature for an LQFP-100?

The J-STD-020 classification peak is 260 °C for lead-free assembly, because the 1.40 mm body sits below the 1.60 mm thickness threshold. Keep time above 217 °C between 60 s and 150 s. Observe the moisture floor life first — MSL 3 allows 168 h at 30 °C and 60 % RH.

What to do next

If your enclosure has 1.6 mm of clearance and your board is two layers, place the 14 × 14 mm LQFP-100 on a density level B footprint and stop there. It is the cheapest way to land 100 nets.

If clearance is under 1.3 mm, move to the TQFP-100 in the same outline and keep the footprint. If board area is the binding constraint and you already have four layers, the TFBGA is the better trade — but budget for X-ray inspection you do not currently need.

Before release, do three checks: confirm the pitch against the ordering suffix, regenerate the land pattern from the actual datasheet rather than a library default, and verify the θJA figure you used matches the stack-up you are building.

References

• JEDEC Solid State Technology Association — MS-026, plastic quad flat package family outline. https://www.jedec.org/standards-documents
• IPC — IPC-7351B, Generic Requirements for Surface Mount Design and Land Pattern Standard. https://www.ipc.org/
• IPC / JEDEC — J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic Surface Mount Devices. https://www.jedec.org/standards-documents
• IPC / JEDEC — J-STD-033, Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices.
• JEDEC — JESD51-3 and JESD51-7, thermal test board definitions for package thermal measurement.

Note: these documents were not retrieved live in this session. Verify every figure against your controlled copy of the standard and the device datasheet before publishing.