Post: Anlogic FPGA Distributor: Series, Stock, and How to Get a Quote

Anlogic

Anlogic FPGA Distributor: Series, Stock, and How to Get a Quote

Anlogic FPGA is a line of low-power, cost-driven programmable logic and FPSoC devices from Shanghai Anlogic Infotech (SSE: 688107), the first FPGA-focused company to list on China’s STAR Market. If you are sourcing Anlogic parts, the catalog splits into four families: PHOENIX for high-performance video, PCIe and SerDes designs; EAGLE for industrial control and display driving; ELF for low-power SoC FPGA work; and SWIFT for RISC-V-plus-MIPI consumer devices. This guide walks each series, the real orderable part numbers and packages, what actually moves the price, where to buy authentic stock, and the assembly details that catch teams off guard when an Anlogic FPGA shows up in a BGA package — so you can pick the right device and land it in your build without surprises.

Anlogic Infotech (SSE: 688107, founded 2011, listed 2021) builds four FPGA/FPSoC families: PHOENIX, EAGLE, ELF, and SWIFT.
Logic density runs from roughly 1,500 LUTs on ELF to 180K LUTs on PHOENIX; hardcores include PCIe Gen3, 12.5 Gbps SerDes, DDR3/DDR4, MIPI D-PHY, and a RISC-V core.
The design tool is TangDynasty (TD); an open-source flow using Yosys and nextpnr exists for EG4S20-class parts.
Anlogic is not Amlogic — different company, different products. The names get confused constantly.
Buy small quantities from LCSC or the JLCPCB parts library; get production pricing through an authorized, traceable distributor by RFQ.

What Is Anlogic FPGA? Company, Chips, and Tools

Shanghai Anlogic Infotech has been designing programmable logic since 2011 and went public on the Shanghai Stock Exchange STAR Market in 2021 — the first A-share company built around FPGAs. The business spans three things that matter to you as a buyer: the FPGA and FPSoC silicon, the EDA software that programs it, and a growing library of IP cores and reference designs. That vertical setup is the reason a domestic part can undercut the incumbents on unit cost for the right design.

First, clear up the name. Anlogic is not Amlogic. Amlogic makes application processors for set-top boxes and smart displays; Anlogic makes FPGAs. The two get swapped in search results and even on some distributor pages, so when you drop a part number into a BOM or a purchasing portal, confirm the manufacturer field reads Anlogic Infotech before you commit.

Anlogic FPGAs are SRAM-based, meaning the configuration bitstream loads from external SPI flash at power-up. The FPSoC parts go further and fold in a hard processor — an embedded MCU on the ELF SoC devices, a RISC-V core on SWIFT — so you can run control code and programmable logic on one die instead of pairing an FPGA with a separate microcontroller. For a compact IoT or display product, that integration is often the whole reason to pick the part.

The design software is TangDynasty, usually shortened to TD, and it handles synthesis, place-and-route, and bitstream generation across the EF2, EF3, and EG4 devices; FutureDynasty is the newer environment aimed at the higher-end parts. If you would rather stay in open tooling, the community Project Tang flow pairs Yosys for synthesis with nextpnr for place-and-route on EG4S20-class chips, though you still lean on TD for the final bitstream. That EG4S20 is also the FPGA on the Sipeed LicheeTang and Tang Premier boards, which is how a lot of engineers first ran a RISC-V softcore — the Hummingbird E203 — on Anlogic silicon.

Anlogic FPGA Series List: PHOENIX vs EAGLE vs ELF vs SWIFT

Four families cover the range, from low-density parts that sit at the budget end of the market to devices with hardened PCIe and multi-gigabit transceivers. The table below is the quick map; the current, authoritative device list lives on Anlogic’s FPGA product page. Specifics for each family follow.

Family (example device)	Positioning	Logic (LUTs)	Key hardcores & memory	Target applications
PHOENIX (PH1A)	High-performance	60K–180K	PCIe Gen1/2/3, SerDes to 12.5 Gbps, DDR3/DDR4 to 1866 Mbps, MIPI 2.5 Gbps, SEU ECC	Video processing, high-speed interfaces, comms infrastructure
EAGLE (EG4 / AL3)	High-efficiency, low-cost	~20K–23.4K	DSP, block RAM, on-chip SDRAM, high-speed diff I/O, pin-compatible footprints	Industrial control, comms access, display driver
ELF (EF2 / EF3)	Low-power SoC FPGA	1,500–4,480	Embedded MCU, on-chip flash, PSRAM (some), 55 nm low-power	IoT, industrial displays, smartphones, comms
SWIFT (SF1)	FPSoC for consumer video	~6K	RISC-V hardcore, MIPI DSI D-PHY 2×4 to 2.2 Gbps, DSC decoder, PSRAM	Consumer electronics, video/camera, RISC-V

PHOENIX (PH1A) is the performance family — 60K to 180K LUTs, SerDes lanes up to 12.5 Gbps, a hardened PCI Express block supporting Gen1/2/3 at x1/x2/x4, DDR3 and DDR4 interfaces to 1866 Mbps, 2.5 Gbps MIPI I/O, and single-event-upset detection with correction. This is what you reach for in video processing, high-speed interface bridging, and communication infrastructure where the transceivers and PCIe do the heavy lifting.

EAGLE covers the mid-range with the EG4 and AL3 sub-series, pitched as low-power, low-cost, high-performance parts with DSP, block RAM, and high-speed differential I/O. The workhorse EG4S20 carries 19,600 LUTs and 19,600 flip-flops, about 156,800 distributed-RAM bits, 1,088 kbit of embedded block RAM, twenty-nine 18×18 multipliers, four PLLs, and an on-chip 64 Mbit SDRAM on a 32-bit bus running up to 200 MHz. It ships in QFN88, BGA256, and CG324, with configuration bitstreams in the 4.8–6 Mbit range loaded from standard SPI flash. Anlogic leans on pin-compatible footprints here to make EAGLE a second-source option for industrial control and display-driver boards.

ELF is the low-power SoC family — EF2 and EF3 — spanning roughly 1,500 to 4,480 LUTs with up to 207 user I/O. EF2 is built on a 55 nm low-power process and embeds an MCU, on-chip flash, and PSRAM on some devices; parts like EF2S45 add 4 Mbit of SPI flash and up to 256 kbit of embedded memory. EF3 extends the family with EF3L15, EF3L50 (no DSP), and EF3L90 (with DSP). Packages run from LQFP100 and LQFP144 up to LFBGA256, which keeps ELF friendly for hand-assembled prototypes and small boards. Typical homes are IoT nodes, industrial displays, smartphones, and communication devices.

SWIFT (SF1) is the FPSoC play for consumer video — about 6K logic cells wrapped around a hardened RISC-V processor, a hardcore MIPI DSI D-PHY supporting 2×4 lanes to 2.2 Gbps, a DSC hard decoder, built-in flash, and 64 or 128 Mbit of PSRAM with its own hardcore controller. The SF102 evaluation board is built on the SF1S60CG121I. If your product is a small display or camera pipeline that needs MIPI and a CPU without a separate SoC, SWIFT is the family to price out.

How to Choose the Right Anlogic FPGA for Your Design

Density is the spec everyone quotes and the one that misleads most often. Here is the order that actually keeps a project out of trouble:

Start from the hardcore you need, not the LUT count. If your design has to talk PCIe Gen3, move a DDR4 interface at 1866 Mbps, drive a MIPI display, or run a CPU, that requirement lands you in a specific family before logic size enters the conversation. Teams routinely over-buy fabric and still miss because the block they needed only exists on another series.
Size logic, DSP, and block RAM with headroom. Fit a trial build in TangDynasty early and leave 20–30% headroom; timing closure and late feature creep both eat resources you thought you had.
Choose the package with assembly in mind. A QFN88 or LQFP144 hand-solders on a bench; a BGA256 or LFBGA256 commits you to stencil, reflow, and X-ray. Pick the package before you route, because it drives your stackup and escape routing.
Confirm the temperature and quality grade. Industrial-temperature parts exist across the range; match the grade to your environment rather than defaulting to the cheapest commercial bin.
Check tool and IP support for the exact device. Verify that TD (or FutureDynasty) supports your target and that the IP cores you need — DDR controller, PCIe, MIPI — are available for that family before you design them in.
Verify the orderable part number is in stock. A device that is perfect on paper but unbuyable in your quantity is not a design win. Confirm the full part number — device, package, and grade — against live distributor stock.

One caution on the pin-compatible pitch: a matching footprint is not a drop-in. Even when an Anlogic device mirrors another vendor’s land pattern, the bitstream, toolchain, and timing are different — you re-verify timing closure, re-run your DFM review, and, on BGA parts, you eat the cost of rework if a swap happens after boards are built. Treat a second source as a re-qualification, not a paste-over.

Where to Buy Anlogic FPGA: Distributors, Lead Times, and MOQs

You can source Anlogic parts through several channels, and the right one depends on quantity and how much traceability you need.

Channel	Best for	Watch for
LCSC	Small quantities, prototyping, live pricing	Confirm the exact package and grade
JLCPCB parts library	Parts plus assembly in one place	Check basic vs extended part status
Authorized distributor (via Anlogic)	Production volume, traceability, support	Lead times on high-density parts; ask for date codes
Independent stocking distributors	Hard-to-find parts, buffer stock	Demand traceability and authenticity documentation

For prototypes and small runs, LCSC stocks Anlogic and shows live pricing, and the JLCPCB parts library carries devices like the EG4X20BG256 (part code C134197) so the chip and the board come from one place. For production, go through Anlogic’s authorized distributor network — its overseas sales desk (sales.oversea@anlogic.com) can route you — where you get real lead times, date-code traceability, and application support. This is also where an EMS partner earns its keep: rolling the FPGA into full component sourcing alongside the passives, connectors, and memory, so you order one BOM instead of chasing a dozen line items.

If you would rather hand off the whole thing, FPGA chip sourcing plus assembly under one roof removes the seams between buying the part and building the board — one quote, one BOM, one point of accountability if a part goes end-of-life or a date code slips.

Authenticity is not a paranoid concern with FPGAs. Industry reporting has documented FPGAs among the most counterfeited semiconductors, with relabeled and reworked parts — falsified date codes, remarked speed grades — turning up even in aerospace and defense supply chains. Anlogic parts are newer and domestic, so the usual risk is not a cloned die; it is grey-market inventory with no traceability, mismatched date codes, or parts pulled from scrapped boards. The fix is the same either way: buy through channels that give you documented traceability, and inspect incoming parts.

On lead time, low-density ELF and EAGLE parts usually ship from stock in small quantities, while higher-density PHOENIX devices with PCIe and SerDes can carry real lead times in volume — plan a buffer and lock your part number early. And here is the trade-off worth internalizing: the cheapest landed unit price can produce the most expensive board. A grey-market part that saves a few cents but triggers a field-return wave over authenticity or a marginal date code costs far more than the savings. Traceability is cheap insurance.

Anlogic FPGA Price: What Drives Cost and How to Get an Accurate Quote

There is no single Anlogic FPGA price, and any page that quotes you one flat number is guessing. What sets the cost is a short list: logic density, whether the part carries hardened SerDes or PCIe, the package (a bare QFN is cheaper to buy and to place than a large BGA), the temperature and quality grade, your order quantity, and the lead time you are willing to accept.

As a rough map, the low-density ELF and small EAGLE parts — 1,500 to roughly 20,000 LUTs — sit at the budget end of the FPGA market, which is exactly why they show up in cost-sensitive consumer and IoT designs. The EG4S20’s 19,600 LUTs land it in commodity territory. PHOENIX is a different animal: 60K to 180K LUTs with 12.5 Gbps transceivers and hardened PCIe pushes it well up the price curve. Match the family to the job and you are not paying for silicon you will not use.

For live small-quantity pricing, check the exact part number on LCSC or the JLCPCB parts library; for volume, send an RFQ to an authorized distributor or your EMS partner and ask for price breaks at your real annual quantity. One more thing, and it is a genuine trap: ignore the pricing pages that describe the EG4S20 as a video camera, a medical scanner, or a turntable. They are auto-generated, they are wrong, and they will quote you nonsense. The EG4S20 is a 19,600-LUT FPGA, full stop.

Designing and Assembling Boards with Anlogic BGA FPGAs

Pick a higher-density Anlogic FPGA and it arrives in a BGA — BGA256 on EAGLE, LFBGA256 on ELF, larger arrays on PHOENIX. That changes your board from a soldering job into a controlled process, and it is where most first-time Anlogic builds run into trouble.

BGA joints sit under the package where you cannot see or touch them, so inspection moves to X-ray and workmanship gets judged against IPC-A-610 acceptance criteria — Class 2 for most commercial products, Class 3 where reliability is critical. Soldering follows J-STD-001. The counterintuitive part is the reflow profile: a faster ramp does not automatically improve yield under a BGA. Push the ramp too hard and trapped flux volatiles and uneven wetting give you voiding and head-in-pillow defects that X-ray then has to catch. Profile to the package and paste, not to the fastest oven you own.

A pattern we see often enough to flag: a team ports a design to an Anlogic BGA part, keeps the reflow profile that worked for their old QFN board, and ships a first batch that looks clean on optical inspection. Weeks later, field returns cluster around intermittent I/O — voided or partially open BGA balls that only X-ray would have caught. The chip was never the problem; the assembly process was tuned for a different package. Set up X-ray and dial the profile before the first production run, not after the returns.

Routing out from a 256-ball array on a fine pitch usually means via-in-pad, which brings its own rule: the vias have to be filled and capped (IPC-4761 fill types) or solder wicks down the barrel during reflow and starves the joint. Budget for the plated, filled, capped process in your stackup and your quote.

The high-speed interfaces demand real signal-integrity work. DDR3/DDR4 at 1866 Mbps and SerDes at 12.5 Gbps need controlled impedance — 50 Ω single-ended, 100 Ω differential — with continuous return paths and matched lengths. Material matters at these rates: standard FR-4 runs on the order of 0.8 dB/inch of insertion loss around 10 GHz, while a low-loss laminate cuts that to roughly 0.3 dB/inch. On a short EAGLE or ELF board you will never notice; on a PHOENIX board pushing 12.5 Gbps across a backplane, that laminate choice is the difference between a link that closes and one that does not — traded against a real jump in bare-board cost.

PHOENIX parts with active transceivers and PCIe also dissipate more than the low-power families, so give them thermal relief on power pins, copper pour, and thermal vias rather than assuming a low-power budget. If you are qualifying a new fab, hold the bare board to IPC-6012 Class 2 or 3 and the design to IPC-2221 for spacing and clearances. Getting the transceiver routing, impedance, and thermal design right is exactly what high-speed PCB fabrication and turnkey PCB assembly are for — the FPGA is only as good as the board under it.

Anlogic FPGA Sourcing and DFM Checklist

Send this to whoever owns the design-in and the purchase order:

Confirm the hardcore you need — PCIe, DDR, MIPI, RISC-V — exists in the family before committing to a device.
Pull the family overview and datasheet (EF2, EF3, and EG4 documents download without registration) and check resource counts against a trial build in TangDynasty with 20–30% headroom.
Lock the package early — QFN/LQFP for hand assembly, BGA for volume — because it drives your stackup and escape routing.
Verify the full orderable part number (device, package, grade) is in stock at your quantity on LCSC or the JLCPCB parts library.
For production, RFQ an authorized distributor for volume pricing, lead time, and date-code traceability.
For BGA parts, specify X-ray inspection and set the IPC-A-610 class in your purchase order.
Use filled-and-capped via-in-pad (IPC-4761) under fine-pitch BGAs, and set controlled impedance on any DDR or SerDes nets.
Send your BOM and Gerber for a DFM review before you commit to a build.

Frequently Asked Questions About Anlogic FPGA

Is Anlogic the same as Amlogic?

No. Anlogic Infotech makes FPGAs and FPSoC devices; Amlogic makes application processors for TVs and streaming boxes. They are separate companies with similar-looking names, and search engines and some distributor pages mix them up. Always confirm the manufacturer field reads Anlogic before ordering.

What software does Anlogic FPGA use?

The main tool is TangDynasty (TD) for synthesis, place-and-route, and bitstream generation across EF2, EF3, and EG4 parts, with FutureDynasty for higher-end devices. An open-source flow using Yosys and nextpnr also works for EG4S20-class chips, though TD handles the final bitstream.

What is the Anlogic EG4S20 used for?

The EG4S20 is a 19,600-LUT EAGLE-family FPGA with on-chip SDRAM and DSP, used in industrial control, display driving, and signal processing. It is also the FPGA on Sipeed’s LicheeTang boards, where it runs a RISC-V Hummingbird E203 softcore for learning and prototyping.

Is Anlogic a good alternative to Xilinx or Altera?

For low-to-mid-density designs — industrial control, displays, IoT, consumer video — Anlogic parts offer competitive cost and pin-compatible footprints. For very high-density logic, large transceiver counts, or the most mature high-end toolchains, the established vendors still lead. Match the family to your actual resource and interface needs.

Where can I buy Anlogic FPGAs outside China?

LCSC and the JLCPCB parts library ship internationally for small quantities, and independent stocking distributors carry common part numbers. For production volume with traceability and support, contact Anlogic’s overseas sales desk to reach an authorized distributor, or route it through an EMS partner’s sourcing.

How much does an Anlogic FPGA cost?

There is no single price. Low-density ELF and small EAGLE parts sit at the budget end of the FPGA market; PHOENIX devices with SerDes and PCIe cost considerably more. Price depends on density, package, grade, and quantity — check LCSC for small-quantity pricing and RFQ a distributor for volume.

Do Anlogic FPGAs come in BGA packages?

Yes. Lower-density parts come in QFN and LQFP (EG4S20 in QFN88, ELF in LQFP100/144), while denser devices use BGA — BGA256 on EAGLE, LFBGA256 on ELF, and larger arrays on PHOENIX. BGA parts require stencil printing, reflow profiling, and X-ray inspection.

Sourcing Anlogic FPGA Without the Guesswork

The Anlogic lineup is easier to navigate than the scattered, often inaccurate search results suggest: four families, a clean split from low-power SoC parts up to PCIe-and-SerDes performance devices, one main toolchain, and real distribution through LCSC, the JLCPCB parts library, and authorized channels. Start from the hardcore you need, size logic with headroom, pick the package before you route, and buy where you get traceability. Get those four right and an Anlogic FPGA is a genuinely cost-effective design-in. If you want a second set of eyes, send your BOM and Gerber for a DFM review and we will quote the parts and the board together.