A TSOP package is a thin, rectangular gull-wing surface-mount package registered by JEDEC at 1.20 mm maximum seated height. It comes in two lead arrangements and at least eleven separate registrations, spanning 20 to 86 leads at pitches from 0.50 mm to 0.80 mm. Below are the registration map, real lead spans from three package drawings, a worked land pattern, and the thermal and parasitic numbers that explain why BGA replaced it in fast memory.
Key takeaways
- Body thickness is 1.00 mm; maximum seated height is 1.20 mm. Those are different numbers and several reference pages conflate them.
- Lead counts do not stop at 48. JEDEC registers TSOP Type I to 56 leads and TSOP II to 66, and 86-pin TSOP II SDRAM ships today.
- Type I has leads on the short edges. Type II has them on the long edges. Neither name tells you the pitch.
- The 400-mil TSOP II family keeps one body (10.16 mm × 22.22 mm) and one lead span (11.76 mm) across 54, 66 and 86 leads. Only the pitch changes.
- An IPC-7351B nominal land pattern for a 48-lead TSOP leaves 0.15 mm between pads, which is at the floor of standard fabrication.
- Vishay’s TSOP4838 and TSOP38238 are infrared receiver modules, not TSOP packages. The name collision pollutes distributor searches.
[IMAGE 1: TSOP Type I and Type II side by side with lead span, body and pitch dimensioned | alt: “TSOP package Type I and Type II compared showing lead span, body size and 0.5 mm pitch”]
What a TSOP package is
A TSOP package is a plastic, leadframe-based surface-mount package with gull-wing leads on two opposite edges, a 1.00 mm nominal body thickness and a 1.20 mm maximum seated height. Lead pitches run 0.50 mm, 0.55 mm, 0.65 mm and 0.80 mm. The format was developed to fit the height budget of a PCMCIA card and became the standard leaded package for memory.
The name describes profile, not geometry. Two parts can both be TSOP and share nothing else: a 48-lead flash device measures 12 mm × 20 mm on 0.50 mm pitch, while a 54-lead SDRAM measures 10.16 mm × 22.22 mm on 0.80 mm pitch with the leads on the other pair of edges.
Type I and Type II
The distinction is simple and worth memorizing. Type I places the leads on the two shorter edges. Type II places them on the two longer edges. Everything else, including pitch, body size and height, varies independently.
In practice the split tracks the application. Type I dominates parallel flash: 48-lead NOR and NAND devices, and 56-lead NOR. Type II dominates SDRAM and MRAM: the 400-mil and 500-mil families at 54, 66 and 86 leads.
The identification rule for a part in hand: measure the edge the leads emerge from. If that edge is the shorter of the two, it is Type I. Datasheets are inconsistent about saying so, and many write only “TSOP” with a body size such as 12 × 20. That notation is itself ambiguous, because the second number is usually the lead span rather than the body length.
Every JEDEC TSOP registration in one table
Registrations and lead counts below come from the JEDEC JEP95 index by device type, updated March 2026, cross-checked against the JEDEC master outline index.
| Registration | Family | Registered lead counts |
| MS-025 (was MO-132) | TSOP II, 7.62 mm body | 20, 24 |
| MS-024 (was MO-133) | TSOP II, 10.16 mm body | 28, 32, 44 |
| MO-135 | TSOP II, 12.70 mm body | 32, 34, 50, 54 |
| MO-142 | TSOP Type I | 24, 32, 40, 48, 56 |
| MO-182 | TSOP II, 16 mm body | not enumerated |
| MO-183 | TSOP Type I, 0.55 mm pitch | 28 |
| MO-201 | TSOP II, 2-high and 4-high stacked | 32 |
| MO-238 | TSOP II, 2-high stacked | 54, 66 |
| MO-249 | Thin SO, 8.89 mm body | 28, 32, 36, 40, 44, 52, 56, 64, 68 |
| MO-259 | Very very thin SO Type I | 48 |
Two corrections fall out of that table. The widely repeated claim that TSOP lead counts run from 20 to 48 is wrong: MO-142 registers Type I to 56 leads, MO-238 registers Type II to 66, and MO-249 reaches 68. Micron and ISSI both ship 86-pin TSOP II SDRAM outside any of these numbers.
MS-024 also carries a June 2006 revision letter, which makes it one of the more recently maintained registrations in the family. TSOP is legacy in application, not in standards upkeep.
TSOP dimensions
Three outlines cover most of what you will meet. Values are from manufacturer package drawings, not from summary tables.
| Parameter | 48-lead Type I | 54-lead Type II (400 mil) | 86-lead Type II (400 mil) |
| Body | 12.0 ± 0.1 × 18.4 ± 0.1 mm | 10.16 × 22.22 mm | 10.16 ± 0.10 × 22.22 ± 0.05 mm |
| Lead span | 20.0 ± 0.2 mm | 11.56 / 11.76 / 11.95 mm | 11.76 ± 0.20 mm |
| Pitch | 0.50 mm | 0.80 mm BSC | 0.50 mm |
| Max height | 1.20 mm | 1.20 mm | 1.20 mm |
| Body thickness | 1.00 ± 0.05 mm | 0.95 / 1.00 / 1.05 mm | 1.1 ± 0.1 mm |
| Standoff | 0.10 ± 0.05 mm | 0.05 / 0.10 / 0.15 mm | 0.10 ± 0.05 mm |
| Lead width | 0.22 ± 0.05 mm | 0.30 / 0.35 / 0.45 mm | 0.22 mm |
| Foot length | 0.60 ± 0.15 mm | 0.40 / 0.50 / 0.60 mm | 0.60 ± 0.15 mm |
| Source | Renesas PTSA0048KF | Everspin TSOP2 guide, per MS-024 | Renesas PTSB0086KB |
Note what the 48-lead Type I row shows that summary tables omit. Body length is 18.4 mm; lead span is 20.0 mm. Wikipedia’s table gives 12 × 18.4 and stops, so a designer working from it has no toe-to-toe dimension and cannot build a footprint. Renesas’ drawing PTSA0048KF also flags that the 12.0 mm body figure excludes mold flash, and permits up to 12.4 mm with it, which is the number your courtyard has to clear.
The 400-mil family scales by pitch, not by size. Renesas publishes 54-lead, 66-lead and 86-lead TSOP II drawings on the same 10.16 mm × 22.22 mm body with the same 11.76 mm lead span. The pitches are 0.80 mm, 0.65 mm and 0.50 mm. The arithmetic explains it:
54 leads: 27 per side, 26 × 0.80 mm = 20.8 mm lead row
66 leads: 33 per side, 32 × 0.65 mm = 20.8 mm lead row
86 leads: 43 per side, 42 × 0.50 mm = 21.0 mm lead row
One 22.22 mm body absorbs all three. That is why an SDRAM upgrade from 54 to 86 pins historically kept the same board outline and only changed the land pattern pitch. Vendor drawings differ slightly on the body length, with Renesas quoting 22.17 ± 0.05 mm on its 54-lead 400-mil drawing against Everspin’s 22.22 mm nominal, so check the specific part.
TSOP vs TSSOP and BGA
| Attribute | TSOP Type I (48-lead) | TSOP II (54-lead) | TSSOP (48-lead) | Fine-pitch BGA |
| Max height | 1.20 mm | 1.20 mm | 1.20 mm | 1.00 mm and below |
| Pitch | 0.50 mm | 0.80 mm | 0.50 mm | 0.50 to 0.80 mm |
| Body | 12.0 × 18.4 mm | 10.16 × 22.22 mm | 6.1 × 12.5 mm | 8 × 8 mm and up |
| Leads per edge | 24 | 27 | 24 | none, area array |
| Inspection | Visual and AOI | Visual and AOI | Visual and AOI | X-ray only |
| Typical use | Parallel flash | SDRAM, MRAM | Logic, analog | Modern memory |
TSSOP is not a smaller TSOP with a different name. At the same 48-lead count and the same 0.50 mm pitch, Renesas’ TSSOP body is 6.1 mm × 12.5 mm against the TSOP’s 12.0 mm × 18.4 mm. TSSOP carries the leads on the long edges of a much smaller body and serves logic and analog rather than memory.
The move to BGA was driven by electrical behavior rather than area, which the next section quantifies.
TSOP pinout
Numbering follows the standard rule. Pin 1 sits at the marked index corner, numbering runs down one lead row and back up the other, and pin 1 faces the highest-numbered pin across the body. On a 48-lead Type I part, pin 24 and pin 25 are the diagonal pair at the far end.
Function assignment is not standardized by the package, but it is heavily standardized by device class. Parallel NOR flash in 48-lead TSOP Type I is broadly footprint-compatible across vendors and densities, which is why Spansion, Micron and Macronix parts have historically dropped into the same board. NAND in 48-lead TSOP Type I follows the ONFI pin assignment. Neither compatibility is a property of the package, so confirm it per device.
One trap is specific to Type II memory. Some SDRAM and MRAM devices are offered with mirrored pinouts for double-sided module assembly. The package drawing is identical and the part number differs by one character. Read the ordering information, not the mechanical drawing.
[IMAGE 2: TSOP Type I 48-lead top view with pin 1 index and numbering direction | alt: “TSOP package pinout numbering for a 48-lead Type I with pin 1 index corner”]
TSOP footprint: a worked IPC-7351B land pattern
TSOP falls under IPC-7353, gullwing leads on two sides. Taking the 48-lead Type I drawing above, with Nominal density (Level B) fillet goals of Jt = 0.35 mm, Jh = 0.35 mm and Js = 0.03 mm, and assuming 0.05 mm fabrication allowance and 0.05 mm placement accuracy:
Lead span L runs 19.80 mm to 20.20 mm, so Ltol = 0.40 mm. Inner lead separation S runs from 19.80 − 2(0.75) = 18.30 mm to 20.20 − 2(0.45) = 19.30 mm, so Stol = 1.00 mm. Lead width W runs 0.17 mm to 0.27 mm, so Wtol = 0.10 mm.
Outer pad extent
Z = Lmin + 2Jt + √(Ltol² + F² + P²)
= 19.80 + 0.70 + 0.406 = 20.91 mm
Inner pad gap
G = Smax − 2Jh − √(Stol² + F² + P²)
= 19.30 − 0.70 − 1.003 = 17.60 mm
Pad width
X = Wmin + 2Js + √(Wtol² + F² + P²)
= 0.17 + 0.06 + 0.123 = 0.35 mm
| Land pattern parameter | Value |
| Pad size | 0.35 mm × 1.65 mm |
| Row centreline spacing | 19.25 mm |
| Outer pad extent (Z) | 20.91 mm |
| Inner gap (G) | 17.60 mm |
| Pad pitch | 0.50 mm |
| Pad-to-pad clearance | 0.15 mm |
| Pad row length | 11.85 mm |
| Total copper, 48 pads | 27.7 mm² |
The clearance figure is the one to act on. 0.15 mm between adjacent pads sits at the floor of standard Class 2 fabrication and leaves no room for a solder-mask dam at a 0.10 mm minimum web. Gang-relieve the mask across each row rather than defining apertures per pad. If your fabricator is not comfortable at 0.15 mm, trim the pad: Renesas’ own recommended land pattern for its 48-lead TSSOP, also on 0.50 mm pitch, uses 0.28 mm pads, which returns 0.22 mm of clearance at the cost of side fillet.
Courtyard is set by the mold-flash allowance, not the copper. With 20.91 mm of pad extent against a 12.4 mm maximum body width including flash, the keep-out is roughly 21 mm × 12.5 mm before you add density-level excess.
Thermal and electrical behavior
JCET, which assembles this package, publishes simulated figures for a 48-lead TSOP on a 12 mm × 20 mm body, mounted on a four-layer board per JESD51-5 under natural convection per JESD51-2:
- θJA = 60 °C/W with a 150 mil × 150 mil die
- θJA = 75 °C/W with a 100 mil × 100 mil die
The 25% swing from die size alone is worth noting. A TSOP thermal number quoted without a die size is not usable.
The electrical figures explain the migration to BGA. In the same JCET brief, a signal path through the lead plus a 1.90 mm gold bond wire simulates at 152 mΩ to 158 mΩ of resistance and 5.07 nH to 5.75 nH of inductance at 100 MHz. Roughly 5 nH in series with every data pin is tolerable at SDR-133 and becomes a limit as edge rates sharpen. Area-array packages shorten that path by an order of magnitude, which is why DDR2 and later left TSOP behind while SDR SDRAM stayed.
Assembly
JCET rates the package at JEDEC moisture sensitivity level 3, with qualification at −65 °C to 150 °C for 1,000 temperature cycles, 85 °C and 85% RH for 1,000 hours, and 121 °C at 2 atm for 168 hours in the pressure cooker test. MSL 3 means a 168-hour floor life after the dry pack opens. On a 1.00 mm body, moisture and a reflow ramp are a real risk, so bake anything with an expired or unknown floor-life record.
Coplanarity is the other constraint. With 24 leads per edge on a thin frame and only 0.10 mm of nominal standoff, a bent corner lead does not self-correct during reflow. Inspect incoming trays, and handle in trays rather than loose.
Stencil aperture at 0.35 mm × 1.65 mm on a 0.12 mm foil gives an area ratio well above 0.66. Keep the aperture 1:1 with the pad and chamfer the corners; reducing width on 0.50 mm pitch starves the outer joints where coplanarity is worst.
Lifecycle and sourcing
TSOP is neither dead nor uniformly healthy. Three distinct situations exist.
Current and well supplied. Parallel NAND in 48-lead TSOP Type I remains in production. Micron lists numerous MT29F densities that DigiKey files under the package field “48-TSOP I”. Supply is not uniform even here: the MT29F2G08ABAEAWP:E currently shows out of stock at DigiKey with backorders unavailable and a per-30-day purchase limit.
Current but second-sourced. SDRAM in 54-pin TSOP II is largely served by specialists. Alliance Memory publicly positions its AS4C32M16SB as a pin-for-pin replacement for Micron’s discontinued MT48LC32M16A2P, and states it bought the remaining Micron stock in 2014. ISSI’s IS42S16320F-7TLI, a 512 Mbit part in 54-TSOP II, is active at DigiKey with 2,636 pieces in stock at $13.21 in single quantity and a 12-week factory lead time.
Delisted. Older NOR flash is thinning. RS no longer stocks the Spansion AM29F160DB-75EI in 48-pin TSOP.
One sourcing hazard has nothing to do with packages. Vishay’s TSOP4838 and TSOP38238 are infrared receiver modules in a 5 mm × 4.8 mm × 6.95 mm through-hole body. Searching a distributor for “TSOP48” returns them alongside 48-lead TSOP memory. Filter by category before you filter by name.
Five mistakes on TSOP boards
- Building a footprint from a body size. A 12 × 18.4 mm body tells you nothing about the 20.0 mm lead span you need. Get the drawing.
- Assuming “12 × 20” means the body. For Type I, the second number is usually the lead span.
- Ignoring mold flash. The 12.0 mm body is permitted to reach 12.4 mm with flash. Courtyards drawn to the nominal will collide.
- Treating TSOP and TSSOP as the same family. At 48 leads and 0.50 mm pitch, the bodies differ by roughly a factor of three in area.
- Skipping the bake. MSL 3 on a 1.00 mm body is where popcorning happens.
TSOP FAQ
What does TSOP stand for?
Thin Small Outline Package. It is a JEDEC-registered family of plastic surface-mount packages with gull-wing leads on two opposite edges, a 1.00 mm nominal body thickness and a 1.20 mm maximum seated height. The family covers 20 to 86 leads at pitches of 0.50 mm, 0.55 mm, 0.65 mm and 0.80 mm.
What is the difference between TSOP Type I and Type II?
Type I places its leads on the two shorter edges of the rectangular body; Type II places them on the two longer edges. Nothing else follows from the type. Pitch, body size and lead span all vary independently, so the type designation narrows the search but never identifies a footprint on its own.
What is the difference between TSOP and TSSOP?
Different families with different bodies. At 48 leads and 0.50 mm pitch, a Renesas TSOP Type I body measures 12.0 mm × 18.4 mm while its TSSOP body measures 6.1 mm × 12.5 mm. TSOP serves memory, TSSOP serves logic and analog. Maximum height is 1.20 mm for both, so height does not distinguish them.
How thick is a TSOP package?
Body thickness is 1.00 mm nominal and maximum seated height, measured from the board to the top of the package, is 1.20 mm. Sources quoting “about 1 mm” are giving body thickness. If you are checking clearance under a shield or an enclosure, use 1.20 mm plus your standoff.
Is the TSOP package still used?
Yes, unevenly. Parallel NAND flash in 48-lead TSOP Type I remains in volume production. SDRAM in 54-pin TSOP II is available but increasingly from second sources such as Alliance Memory and ISSI rather than the original vendors. Older NOR flash in this package is being delisted by distributors.
Choosing TSOP today
Specify TSOP when the device you need only exists in it, when the board must be inspectable without X-ray, or when you are maintaining a design where a footprint change costs more than the package does. Parallel NAND and industrial SDRAM both fall squarely in that description, and the package will be orderable for years.
Move to a fine-pitch BGA when signal integrity is the constraint. Roughly 5 nH per pin is the number to test your timing budget against, and no layout technique removes it.
Before you commit either way, do three things in order: read the lead span off the specific drawing rather than a summary table, confirm the mold-flash allowance against your courtyard, and check the part’s stock and lead time at two authorized distributors. The first two prevent a board spin; the third prevents a build stoppage.
[IMAGE 3: IPC-7351B land pattern for a 48-lead TSOP with pad size and row spacing annotated | alt: “TSOP package footprint land pattern with 0.35 by 1.65 mm pads on 19.25 mm row spacing”]
Internal links to add
- [INTERNAL LINK: SSOP-56 package → SSOP dimensions and footprint at high pin count]
- [INTERNAL LINK: SSOP-8 package → decoding conflicting SSOP names]
- [INTERNAL LINK: TSSOP package → TSSOP body widths and pitch options]
- [INTERNAL LINK: IPC-7351 land pattern density levels → choosing Most, Nominal or Least]
- [INTERNAL LINK: moisture sensitivity level → MSL floor life and baking rules]
