An SSOP-20 package built to JEDEC MO-150 measures 6.9–7.5 mm along the body, 5.0–5.6 mm across it, spans 7.4–8.2 mm lead tip to lead tip on 0.65 mm pitch, and stands 2.0 mm tall at most. Two other 20-lead outlines also ship as SSOP-20, one of them at 0.635 mm pitch. Check the drawing number before you cut a footprint.
Key takeaways
- MO-150 geometry, per Texas Instruments drawing DB0020A (4214851/B, 08/2019): 0.65 mm pitch, body 6.9–7.5 mm × 5.0–5.6 mm, lead span 7.4–8.2 mm, foot 0.55–0.95 mm, 2.0 mm max height.
- Analog Devices publishes three 20-lead drawings in this space: RS-20 (MO-150-AE, 0.65 mm), GN20 labeled SSOP narrow 0.150 inch (0.635 mm), and RQ-20 labeled QSOP (MO-137-AD). Same vendor, two pitches, three names.
- TI’s land pattern is 20 pads of 1.85 mm × 0.45 mm on 0.65 mm pitch with rows on 7.00 mm centers. Renesas publishes 1.23 mm × 0.40 mm pads on the same package family, an 8.38 mm outer span against TI’s 8.85 mm.
- The SSOP-20 and SSOP-16 land patterns share the same 7.00 mm row centers and the same pad size. Only the pad count and row length change.
- Board area is 56.16 mm² against 133.33 mm² for the 20-lead wide SOIC and 41.60 mm² for TSSOP-20, per TI’s package comparison tables.
- Two published thermal numbers exist for the same package: 92.1 °C/W in the SN74HC245 data sheet and 69.50 °C/W on a high-K board at 0 LFPM. Always quote the board condition with the number.
Which package is being sold as SSOP-20
Shrink Small Outline Package is a family name, and JEDEC registered more than one 20-lead outline inside it. The JEP95 index lists MO-150 (5.3 mm body width, 0.65 mm pitch) with 20 leads among its variations, and MO-137 (0.150 inch body width, 0.025 inch pitch) with 20 leads as well.
Analog Devices makes the collision visible in its own package library. RS-20 is drawn as a 20-lead SSOP compliant to MO-150-AE. GN20 is titled 20-Lead Plastic SSOP (Narrow 0.150 Inch) and runs 0.635 mm pitch on a 3.810–3.988 mm body. RQ-20 carries the same MO-137 geometry under the name QSOP.
Table 1. Three 20-lead outlines that reach a BOM as SSOP-20
| Sold as | JEDEC ref | Pitch (mm) | Body W × L (mm) | Lead span (mm) | Max height (mm) | Example drawings |
| SSOP-20, 5.3 mm body | MO-150-AE | 0.65 | 5.0–5.6 × 6.9–7.5 | 7.4–8.2 | 2.00 | TI DB0020A; ADI RS-20; Renesas PYG20 |
| SSOP-20 narrow / QSOP-20 | MO-137-AD | 0.635 | 3.81–3.99 × 8.56–8.74 | 5.82–6.20 | 1.75 | ADI GN20; ADI RQ-20 |
| TSSOP-20 listed as SSOP20 | MO-153 | 0.65 | 4.3–4.5 × 6.4–6.6 | 6.2–6.6 | 1.20 | TI PW0020A; adapter listings “SOP20/SSOP20/TSSOP20” |
Note what the narrow version does to board length. GN20 is 8.56–8.74 mm long, more than a millimeter longer than the MO-150 part, because 0.635 mm pitch on a 3.9 mm body forces the die out lengthwise. Narrower is not automatically smaller.
[IMAGE 1: dimensioned top and side view of the MO-150 SSOP-20 outline with pitch, body, span and height called out | alt: “SSOP-20 package dimensions diagram showing 5.3 mm body width, 7.2 mm length and 7.8 mm lead span”]
SSOP-20 dimensions you can design to
The MO-150 SSOP-20 body is 5.0 to 5.6 mm wide and 6.9 to 7.5 mm long. Leads sit on 0.65 mm pitch across a 7.4 to 8.2 mm span, each 0.22 to 0.38 mm wide with a 0.55 to 0.95 mm foot. Maximum seated height is 2.0 mm and minimum standoff is 0.05 mm.
Table 2. MO-150 SSOP-20, three independent sources
| Parameter | TI DB0020A (4214851/B) | ADI RS-20 | Amkor DS360 (nominal) |
| Lead pitch | 0.65 (18 spaces, 5.85 total) | 0.65 BSC | 0.65 |
| Body width | 5.0–5.6 | 5.00–5.60 | 5.3 (209 mil) |
| Body length | 6.9–7.5 | 6.90–7.50 | 7.2 |
| Lead span | 7.4–8.2 typ | 7.40–8.20 | 7.80 |
| Overall height | 2.00 max | 2.00 max | 1.86 |
| Body thickness | not called out | 1.65–1.85 | 1.73 |
| Standoff | 0.05 min | 0.05 min | 0.13 |
| Lead width | 0.22–0.38 | 0.22–0.38 | — |
| Foot length | 0.55–0.95 | 0.55–0.95 | — |
| Lead thickness | not called out | 0.09–0.25 | — |
| Lead angle | 0°–8° | 0°–8° | — |
All values in millimeters. TI and ADI publish tolerance bands; Amkor publishes assembly nominals, which is why its 1.86 mm overall height sits below the 2.00 mm drawing limit rather than contradicting it.
SSOP-20 pinout and pin 1 orientation
The package fixes geometry, not function. Pins count counterclockwise from the pin 1 index area: 1 through 10 down the left edge in the top view, 11 through 20 back up the right edge.
The SN74HC245 data sheet (SCLS131F) prints a single pin diagram for the DB, DGV, DW, N, J, W and PW packages: DIR on 1, A1–A8 on 2 through 9, GND on 10, B8–B1 on 11 through 18, OE on 19 and VCC on 20. Only the FK ceramic chip carrier renumbers, because its 20 terminals wrap four sides.
That is the practical rule for 20-pin logic and interface parts: the schematic symbol survives a package change, the footprint does not. Verify the assignment against the specific data sheet anyway, since pin 1 on an analog part in the same body can be anything.
[IMAGE 2: top view of a 20-lead SSOP with the pin 1 index area highlighted and counterclockwise numbering | alt: “SSOP-20 pinout top view with pin 1 index mark and counterclockwise numbering to pin 20”]
SSOP-20 footprint and land pattern
TI’s example board layout for DB0020A specifies 20 pads of 1.85 mm × 0.45 mm on 0.65 mm pitch, rows on 7.00 mm centers, with 0.07 mm of solder mask relief all around and non-solder-mask-defined pads preferred. That gives an 8.85 mm outer span, a 5.15 mm inner gap and a 6.30 mm pad-row length.
Table 3. Published 20-lead lands compared
| Source and package | Pitch (mm) | Pad (mm) | Outer span (mm) | Inner gap (mm) |
| TI DB0020A, SSOP-20 | 0.65 | 1.85 × 0.45 | 8.85 | 5.15 |
| Renesas PYG20, 20-SSOP 5.3 mm | 0.65 | 1.23 × 0.40 | 8.38 | 5.92 |
| ADI GN20, SSOP narrow 0.150 in | 0.635 | 1.14 × 0.42 | not published | 3.81–4.19 |
| TI PW0020A, TSSOP-20 | 0.65 | 1.50 × 0.45 | 7.30 | 4.30 |
Both of the first two rows are MO-150 parts, and they are not the same land. Run the fillet arithmetic and the design intent separates. Heel span for MO-150 is lead span minus twice the foot length, so 5.50 mm at worst case and 6.30 mm at nominal.
Against TI’s 8.85 mm outer land, a maximum-span part still gets 0.325 mm of toe fillet, and its 5.15 mm inner gap gives 0.175 mm of heel even on a minimum-heel part. Against the Renesas land, the toe fillet falls to 0.09 mm and the 5.92 mm inner gap sits outboard of the 5.50 mm worst-case heel, so a worst-case part gets no heel fillet at all. On a nominal part the Renesas land still leaves 0.19 mm of heel.
Neither is wrong. TI’s land tolerates worst-case parts and worst-case placement; the tighter land buys clearance on a dense board and assumes parts near nominal. Pick the one that matches your inspection class, and hold the choice in the library rather than per project.
Two more numbers worth carrying. Paste on the 0.125 mm stencil TI specifies works out to 1.85 × 0.45 × 0.125 = 0.104 mm³ per pad, 2.08 mm³ for the part. And the SSOP-20 land is the SSOP-16 land with two extra pads per row: same 7.00 mm centers, same pad, row length grows from 5.00 mm to 6.30 mm.
[INTERNAL LINK: SSOP-16 package dimensions and footprint -> SSOP-16 reference article]
[IMAGE 3: recommended SSOP-20 land pattern with pad size, pitch, row centers and mask relief | alt: “SSOP-20 footprint with 1.85 by 0.45 mm pads on 0.65 mm pitch and 7.00 mm row centers”]
What the package costs you thermally and electrically
TI publishes a comparison of 20-lead logic bodies that puts numbers on the trade. Board area, mass and parasitics all move together with pin pitch.
Table 4. TI package comparison, 20 leads, θJA on a high-K board at 0 LFPM per JESD51-5
| Metric | SOIC-20 (DW) | SSOP-20 (DB) | TSSOP-20 (PW) | QFN-20 (RGY) |
| Body length (mm) | 12.825 | 7.20 | 6.50 | 4.50 |
| Lead span (mm) | 10.40 | 7.80 | 6.40 | 3.50 |
| Max height (mm) | 2.65 | 2.00 | 1.20 | 1.00 |
| Board area (mm²) | 133.33 | 56.16 | 41.60 | 15.75 |
| Mass (g) | 0.495 | 0.151 | 0.075 | 0.043 |
| θJA (°C/W) | 57.7 | 69.50 | 83.00 | 37.31 |
| Average lead inductance (nH) | 5.012 | 3.495 | 2.808 | 1.178 |
| Average lead capacitance (pF) | 0.717 | 0.420 | 0.317 | 0.252 |
Amkor simulates the same body per lead rather than as an average: for a 20-lead 5.3 mm × 7.2 mm SSOP at 100 MHz, the longest lead shows 2.260 nH and 0.395 pF, the shortest 0.958 nH and 0.209 pF. Put the clock and the ground return on short leads when the pinout allows it.
Work the ground bounce. An SN74HC245 output sinking 6 mA with an 8 ns transition at 4.5 V pushes 6 mA ÷ 8 ns through a 2.26 nH lead, which is 1.7 mV. Eight outputs switching through one ground lead give roughly 14 mV, small for HC logic and a real budget item at 1.8 V.
Thermal numbers need their conditions attached. The SN74HC245 data sheet lists 92.1 °C/W for the DB package; TI’s package comparison lists 69.50 °C/W for the same SSOP-20 on a high-K board at zero airflow. Amkor measures a 20-lead 3.9 mm × 8.7 mm body on a single-layer board at 80.8, 73.2 and 69.2 °C/W for 0, 200 and 500 LFPM. The copper under the part moves θJA as much as the airflow does.
The data sheet also gives ψJT = 16.5 °C/W for the DB package, which is the number you actually use on the bench. Measure 95 °C on top of the package with a fine thermocouple at 150 mW dissipation and the junction sits at 95 + 16.5 × 0.15 = 97.5 °C, against a 150 °C absolute maximum.
Tape, reel, moisture and lifecycle
The SN74HC245DBR ships 2,000 pieces on a 330 mm reel in 16 mm tape: cavity A0 8.2 mm, B0 7.5 mm, K0 2.5 mm, pitch P1 12.0 mm, pin 1 in quadrant Q1. At 0.151 g per part that is about 302 g of silicon and copper per reel.
The TSSOP version uses the same 16 mm tape on 8.0 mm pitch, so one feeder setup covers both widths but a reel of TSSOP carries 50 percent more parts per meter of tape. The wide SOIC and the SOP versions jump to 24 mm tape.
Moisture rating on the TI part is Level-1-260C-UNLIM with a NIPDAU finish, so no bake and no floor-life clock. Amkor qualifies its SSOP and QSOP lines with JEDEC level 3 preconditioning at 30 °C and 60 percent relative humidity for 192 hours, which is the assembly-house qualification, not the rating printed on your reel label.
Check lifecycle before you commit the footprint. In the July 2026 addendum for the SN74HC245, the reeled DBR, DWR, NSR and PWR options are active while the tube and tray variants SN74HC245DW, SN74HC245PW and SN74HC245PWT are obsolete. Hand-build prototypes may push you to the PDIP or to a cut strip of the SSOP reel.
[INTERNAL LINK: moisture sensitivity level handling -> SMT storage and bake-out article]
Choosing SSOP-20 over the alternatives
- Choose MO-150 SSOP-20 when the design needs 20 leads in half the board area of a wide SOIC and can spend 2.0 mm of height: 56.16 mm² against 133.33 mm².
- Choose TSSOP-20 when height is capped near 1.2 mm or when the extra 14.56 mm² matters, and accept about 13 °C/W more thermal resistance on the same board type.
- Choose the wide SOIC when the part dissipates power or the line hand-reworks: 57.7 °C/W and 1.27 mm pitch.
- Choose QFN-20 only when the assembly process supports voiding inspection: 15.75 mm² and 37.31 °C/W are real, and so is the loss of visible fillets.
- Order the footprint from the drawing number in the mechanical section of the data sheet. Package names in parametric tables are not specifications.
[INTERNAL LINK: TSSOP-20 package dimensions -> TSSOP reference article]
Five mistakes that scrap SSOP-20 boards
- Reusing a 0.635 mm library part for an MO-150 device. Across 10 pads per row the accumulated error reaches 0.135 mm, which walks the outer leads off the pads.
- Trusting a summary table over a drawing. TI’s own QFN comparison sheet prints 0.50 mm in the pitch row for SSOP-20; drawing DB0020A prints 0.65 mm, and the drawing governs.
- Copying an SSOP-16 land and stretching it without adding the two pads per row. Row length has to grow from 5.00 mm to 6.30 mm; the 7.00 mm row centers do not change.
- Quoting a θJA without its board. The same SSOP-20 is documented at 92.1 and 69.50 °C/W under different conditions, a 25 percent spread that swallows most thermal margins.
- Assuming a tube option exists. Several 20-lead SSOP tube and tray part numbers are obsolete while the reel versions stay active.
Frequently asked questions
What are the dimensions of an SSOP-20 package?
For JEDEC MO-150, the body is 5.0 to 5.6 mm wide and 6.9 to 7.5 mm long, leads sit on 0.65 mm pitch across a 7.4 to 8.2 mm span, and maximum height is 2.0 mm. Lead width is 0.22 to 0.38 mm and foot length 0.55 to 0.95 mm.
What is the pin pitch of an SSOP-20?
Normally 0.65 mm. A second registered outline, MO-137, uses 0.635 mm on a narrower 3.9 mm body, and Analog Devices sells it both as GN20 SSOP and as RQ-20 QSOP. Confirm the pitch on the drawing rather than the package name.
Is SSOP-20 the same as TSSOP-20?
No. TSSOP-20 under MO-153 is 4.3 to 4.5 mm wide with a 6.2 to 6.6 mm lead span and 1.2 mm maximum height. SSOP-20 is 5.0 to 5.6 mm wide, spans 7.4 to 8.2 mm and stands 2.0 mm. Both use 0.65 mm pitch, and their land patterns differ by 1.55 mm in outer span.
What footprint should I use for SSOP-20?
TI recommends 20 pads of 1.85 mm × 0.45 mm on 0.65 mm pitch with rows on 7.00 mm centers, non-solder-mask-defined, 0.07 mm mask relief. Renesas publishes a tighter land for the same package family at 8.38 mm outer span, suited to nominal parts on dense boards.
How much smaller is SSOP-20 than SOIC-20?
About 58 percent less board area. TI lists 56.16 mm² for SSOP-20 against 133.33 mm² for the 20-lead wide SOIC, and mass drops from 0.495 g to 0.151 g. The trade is 11.8 °C/W more junction-to-ambient resistance on the same board type.
How many SSOP-20 parts come on a reel?
Two thousand for TI 20-lead SSOP logic, on a 330 mm reel in 16 mm tape with 12 mm cavity pitch. The TSSOP version uses the same tape width at 8 mm pitch, while wide SOIC and SOP versions need 24 mm tape and a different feeder.
What to do next
Pull the mechanical drawing for the exact orderable part number and read three fields: pitch, lead span and maximum height. MO-150 at 0.65 mm means the 8.85 mm land and a 2.0 mm height budget. MO-137 at 0.635 mm means a separate library part, and name it QSOP so it never gets reused for the wider body.
If the design has 1.2 mm of headroom and no thermal problem, TSSOP-20 saves 14.56 mm² and the same feeder handles the tape. If it dissipates more than a few hundred milliwatts, spend the area on the wide SOIC. SSOP-20 is the right answer when board length is the constraint and 2 mm of height is free.
Sources
- Texas Instruments, SN54HC245 / SN74HC245 data sheet SCLS131F (DB0020A and PW0020A drawings, thermal metrics, tape and reel, package addendum): https://www.ti.com/lit/ds/symlink/sn74hc245.pdf
- Texas Instruments, QFN package comparison tables: https://www.ti.com/pdfs/logic/qfncompare.pdf
- Analog Devices, RS-20 20-lead SSOP drawing (MO-150-AE): https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ssoprs/rs_20.pdf
- Analog Devices / Linear Technology, GN20 20-lead SSOP narrow 0.150 inch drawing: https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-ssop/05081641_b_gn20.pdf
- Amkor Technology, SSOP/QSOP leadframe products data sheet DS360R: https://amkormarcomexternal.blob.core.windows.net/amkordotcom/wp-content/uploads/2018/02/SSOP-QSOP_DS360.pdf
- Renesas, package outline drawing PYG20, 20-SSOP 5.3 mm body, 0.65 mm pitch: https://www.renesas.com/en/document/psc/package-outline-drawing-package-code-pyg20-20-ssop-53-mm-body-065mm-pitch
- JEDEC, JEP95 outline index (MO-150, MO-137, MO-153): https://www.jedec.org/sites/default/files/MOIND_DT.pdf
