An SOP package is a surface-mount plastic package with gull-wing leads on two long sides, usually on 1.27 mm pitch. The name is a family label, not a footprint: SOP covers several body widths and spawns SSOP, TSSOP and TSOP. Two vendors can print “SOP8” and mean parts that differ across the leads. Read the drawing, not the acronym.

Key takeaways

• Standard SOP pitch is 1.27 mm. SSOP drops to 0.65 mm or 0.635 mm, TSSOP to 0.65 or 0.50 mm.
• JEDEC registers the narrow body under MS-012 and the wide body under MS-013; JEITA’s 5.30 mm Type II body is what TI and Fairchild call SOP rather than SOIC.
• ROHM’s own catalogue lists SOP8 at 6.2 × 5.0 mm and SOP-J8 at 6.0 × 4.9 mm — same lead count, same pitch, different outline.
• A 1.27 mm SOP land pattern uses 1.55 × 0.60 mm pads with the rows 5.40 mm apart, centre to centre.
• Thermally, an 8-lead SOP beats TSSOP by about 47 °C/W on the same die, and loses to PDIP by 36 °C/W.
• Most SOP parts ship at MSL 1 with a 260 °C peak classification, so no pre-bake is needed.

[IMAGE 1: dimensioned top and side view of an 8-lead SOP showing body width, lead span, pitch and height | alt: “SOP package dimensions diagram showing 1.27 mm pitch, body width and lead span”]

What SOP means, and why two vendors disagree

SOP stands for small outline package. The lead form defines it: gull-wing leads that bend out and down, landing beside the body rather than under it. That separates SOP from SOJ, which folds its leads underneath, and from SON, which has no leads at all.

The ambiguity comes from two standards bodies naming the same idea. JEDEC registers small-outline bodies at 3.75 mm (.150 inch) and 7.50 mm (.300 inch). JEITA, formerly EIAJ, registers a 5.30 mm Type II body that is slightly thicker and longer. Texas Instruments and Fairchild call the JEDEC widths SOIC and the JEITA width SOP. Many Asian suppliers call all of them SOP. Neither convention is wrong; they are just not interchangeable.

You can see it inside one vendor’s catalogue. ROHM’s 2024 short-form package list carries an SOP8 at 6.2 × 5.0 mm and an SOP-J8 at 6.0 × 4.9 mm, both 8-lead and both on 1.27 mm pitch. A footprint drawn for one will not centre the other.

SOP package dimensions by lead count

The table below is ROHM’s published SOP family, which is one of the few places a full lead-count sweep appears in a single document. Dimensions are width across leads × body length × height.

Package	Pins	Width × length (mm)	Height (mm)	Tape qty
SOP8	8	6.2 × 5.0	1.61	2,500
SOP-J8	8	6.0 × 4.9	1.55	2,500
SOP-JW8	8	6.0 × 4.9	1.65	2,500
SOP14	14	6.2 × 8.7	1.61	2,500
SOP16	16	6.2 × 10.0	1.61	2,500
SOP18	18	7.8 × 11.2	1.91	2,000
SOP20A	20	10.3 × 12.8	2.50	1,500
SOP24	24	7.8 × 15.0	1.91	2,000
SOP28	28	9.9 × 18.5	2.31	1,500

Table 1. SOP family dimensions and tape quantities, from ROHM’s 2024 short-form IC package catalogue. All entries are 1.27 mm pitch.

Two patterns matter for layout. Width across the leads is not constant — it steps from 6.0 mm through 7.8 mm to 10.3 mm as pin count rises, so a wider part needs a wider land pattern, not just a longer one. And height climbs from 1.55 mm to 2.50 mm, which decides whether a part clears an enclosure or a stacked board.

The SOP family: SOIC, SSOP, TSSOP and TSOP compared

Every member of the family is a gull-wing package on two sides. What changes is pitch, body width and height.

Variant	Pitch	Body width	Registration
SOIC narrow	1.27 mm	3.75 mm (.150″) per registration title; 3.81 – 3.98 mm as drawn	JEDEC MS-012
SOIC wide	1.27 mm	7.50 mm (.300″)	JEDEC MS-013
SOP, JEITA Type II	1.27 mm	5.30 mm	JEITA / EIAJ
SO, 8.4 mm body	1.27 mm	8.4 mm	JEDEC MO-059
SSOP	0.65 mm	5.3 mm	JEDEC MO-150
SSOP / QSOP	0.635 mm (.025″)	3.75 mm (.150″)	JEDEC MO-137
TSSOP	0.65 / 0.50 mm	4.4 mm typical	JEDEC MO-153
TSOP II	—	7.62 mm	JEDEC MS-025

Table 2. Small-outline variants and the registrations that govern them, per the JEDEC Publication 95 main index updated 03/26.

Note the first row. MS-012 is titled as a 3.75 mm body, but the drawings built to it specify 3.81 – 3.98 mm — Texas Instruments’ D0008A outline (rev C, 02/2019) is one example. Quote the drawing in a design review, not the registration title.

The prefix letters are a height code, not decoration. JEITA uses T, L and V in front of SOP or SSOP to bracket mounted height, and JEDEC maintains its own equivalent in SPP-017, Standard Overall Profile Height Codes for Packages, issue C, November 2004. An HSOP is an SOP with a heat sink.

SOP footprint, land pattern and stencil

For a 1.27 mm pitch 8-lead part, the recommended land pattern published with TI’s D0008A drawing matches the IPC-7351B nominal-density footprint.

• Eight pads of 1.55 mm × 0.60 mm on 1.27 mm pitch.
• Rows 5.40 mm apart, centre to centre — an outer span of 6.95 mm and an inner gap of 3.85 mm (both derived).
• Non-solder-mask-defined, 0.07 mm mask clearance all round.
• Stencil 1:1 with the pad on a 0.125 mm foil.

If you build the footprint rather than copy it, IPC-7351B sets gull-wing fillet extensions at 0.55 / 0.35 / 0.15 mm toe and 0.45 / 0.35 / 0.25 mm heel for the Most, Nominal and Least density levels, with side extensions of 0.05 / 0.03 / 0.01 mm. Courtyard excess runs 0.5, 0.25 and 0.1 mm per side. Use Most for hand assembly, Nominal for production.

[IMAGE 2: SOP land pattern with pad size, pitch and row spacing dimensioned | alt: “SOP package footprint with 1.55 by 0.60 mm pads on 5.40 mm rows”]

SOP thermal performance against the alternatives

Package choice sets your power budget. TI publishes measured thermal metrics for the same die in several packages in datasheet SLOS068Z, on JEDEC high-K test boards, which makes the comparison clean.

8-lead package	RθJA (°C/W)	Max P_D at 85 °C (derived)
PDIP, suffix P	80.9	803 mW
SO 5.30 mm, suffix PS	116.9	556 mW
SOIC 3.90 mm, suffix D	124.7	521 mW
SOT-23-8, suffix DDF	164.3	396 mW
TSSOP, suffix PW	171.7	379 mW
VSSOP, suffix DGK	181.4	358 mW

Table 3. Thermal metrics from TI SLOS068Z. The final column is derived as (150 − 85) / RθJA, using the 150 °C maximum junction temperature that datasheet specifies.

Worked example. A part dissipating 300 mW in a 70 °C cabinet, in the 5.30 mm SO body, runs at 70 + (0.3 × 116.9) = 105 °C junction. Move the same die to TSSOP and it reaches 70 + (0.3 × 171.7) = 122 °C. Shrinking the package costs 17 °C of margin at that dissipation.

Assembly, moisture sensitivity and tape widths

• Moisture sensitivity: Level 1 with a 260 °C peak classification on TI’s SOIC and SO options, and Level 1 on ROHM’s SOP8. MSL 1 means unlimited floor life at normal factory conditions.
• Lead finish: NIPDAU or matte tin on TI parts; pure tin on the ROHM SOP8, which weighs 0.084 g.
• Tape width differs by body. TI ships the 3.90 mm SOIC on 12 mm tape with pockets A0 = 6.4 mm, B0 = 5.2 mm, K0 = 2.1 mm, and the 5.30 mm SO on 16 mm tape with A0 = 8.35 mm, B0 = 6.6 mm, K0 = 2.4 mm.
• Reel quantity tracks body size: 2,500 pieces for 8- to 16-lead SOP, 2,000 for 18- to 24-lead, 1,500 for 20A and 28-lead.

That tape difference is the quiet consequence of the naming problem: a feeder set up for a narrow-body part will not seat a JEITA-width one, and the error surfaces on the line rather than in CAD.

Choosing an SOP variant

• Power first. Compute (TJmax − TAmax) / RθJA against worst-case dissipation. Above roughly 500 mW at 85 °C, go to an exposed-pad or heat-sink variant rather than a smaller body.
• Assembly capability second. 1.27 mm pitch is hand-solderable and reworkable with a standard iron. At 0.5 mm you need proper stencil and placement control.
• Board area third. TSSOP and SSOP buy area at the cost of thermal headroom, so re-run step one after switching.
• Height fourth. Table 1 spans 1.55 mm to 2.50 mm within SOP alone; TSSOP caps near 1.2 mm.
• Sourcing last. Confirm the drawing for every alternate part, since the same package name covers several outlines.

SOP design mistakes that cause board spins

• Treating SOP and SOIC as one footprint. ROHM’s own catalogue shows two 8-lead SOP entries 0.2 mm apart across the leads.
• Dimensioning from a registration title. MS-012 says 3.75 mm; the drawings built to it say 3.81 – 3.98 mm.
• Copying a land pattern without its solder mask rule. The TI pattern is non-solder-mask-defined with 0.07 mm clearance.
• Reducing stencil apertures below 1:1 at 1.27 mm pitch. Bridging there is a paste-release or placement problem.

SOP package FAQ

What does SOP stand for in electronics?

SOP stands for small outline package: a surface-mount plastic package with gull-wing leads on its two long sides, normally at 1.27 mm pitch. The number after the name gives the lead count, so SOP8 is an 8-lead part. The term also acts as the family label for SSOP, TSSOP and TSOP.

What is the difference between SOP and SOIC?

Mostly naming convention. Texas Instruments and Fairchild reserve SOIC for the JEDEC bodies at 3.75 mm and 7.50 mm, and use SOP for the JEITA Type II body at 5.30 mm. Other suppliers call all of them SOP. Compare the lead span on the drawings before assuming two parts share a footprint.

What is the SOP package pitch?

1.27 mm, equal to 50 mil, on standard SOP. The shrink variants go finer: SSOP at 0.65 mm or 0.635 mm, TSSOP at 0.65 mm or 0.50 mm. Pitch is the single most useful field for identifying which family member you are holding.

Is SOP-8 the same as SOIC-8?

Not reliably. Both are 8-lead gull-wing packages at 1.27 mm pitch, but the bodies differ by vendor convention. ROHM lists SOP8 at 6.2 mm across the leads and SOP-J8 at 6.0 mm in the same catalogue. Check the lead span dimension against your land pattern.

What is the difference between SOP and SSOP?

Pitch and size. SSOP shrinks the lead pitch to 0.65 mm or 0.635 mm and narrows the body, fitting more leads into less board length. JEDEC registers the 5.3 mm SSOP body under MO-150 and the .150 inch, .025 inch pitch version under MO-137. Assembly tolerances tighten accordingly.

What to check before you release an SOP footprint

Open the drawing for the exact orderable part and read the lead span. If it is near 6.0 mm you are on the narrow body and the 1.55 × 0.60 mm pattern on 5.40 mm rows applies directly. Anything wider needs its own library footprint, named for the body width rather than the package.

Then run the thermal number once. If (150 − TAmax) / RθJA leaves you under about 500 mW at your real ambient, specify an exposed-pad or heat-sink variant now, while the board is still cheap to change.