A DIP-20 measures 2.54 mm pin-to-pin and comes in two row spacings that are not interchangeable. Get the row spacing wrong and the part will not seat. This page gives the verified dimensions, the pin-1 rule, and the hole-size arithmetic for cutting the footprint yourself.

Key takeaways

• Pitch is 2.54 mm (0.100 in) in every standard DIP-20. Row spacing is either 7.62 mm (300 mil) or 15.24 mm (600 mil).
• Nearly all 20-pin DIPs you will encounter are 300 mil. The 600 mil width is rare at this pin count.
• Body length is not fixed. TI drawing 4040049/E permits 23.88 mm to 26.92 mm for the same 20-pin package.
• TI notes the 20-pin body falls within JEDEC MS-001 except for minimum body length, and that the end-lead shoulder width is a vendor option.
• Maximum lead width of 0.53 mm sets a 0.73–0.78 mm finished hole under IPC-2222.
• KiCad ships five DIP-20 variants, all at 7.62 mm. There is no 600-mil DIP-20 in the stock library.

What is a DIP-20 package?

A DIP-20 package is a 20-lead dual in-line package: a rectangular molded body with ten through-hole leads down each long side, spaced 2.54 mm apart, with the two rows separated by 7.62 mm in the common variant. It mounts through plated holes or drops into a socket. PDIP-20 denotes the plastic-bodied version.

The naming is loose in practice. Vendors write DIP20, DIP-20, PDIP-20, and 20-DIP for the same part. Distributors disambiguate by appending the row spacing: DigiKey lists the SN74HC245N as 20-DIP (0.300″, 7.62mm). Treat any listing without a row spacing as unverified.

One warning before you search further. “DIP-20” is also a Kramer AV product model, and a CAD-library page for that product ranks for this term. If a result offers a symbol for a device with HDMI and RS-232 pins, you are on the wrong page.

[IMAGE 1: DIP-20 package outline drawing showing body length D, row spacing eA, pitch e, and lead dimensions | alt: “DIP-20 package dimensions diagram showing 2.54 mm pitch and 7.62 mm row spacing”]

DIP-20 dimensions

The table below is drawn from two published 20-pin outlines: STC’s PDIP-20 drawing and TI’s drawing 4040049/E as printed in the CD4000 and SN74HC datasheets. Values are converted to millimetres and rounded to two decimals.

Dimension	Symbol	Min	Nom	Max	Source
Body length	D	25.70	26.06	26.42	STC PDIP-20
Body length (alt. range)	A	23.88	—	26.92	TI 4040049/E
Body width, incl. leads	E	7.37	7.62	7.87	STC PDIP-20
Body width, molded	E1	6.22	6.35	6.48	STC PDIP-20
Overall height	A	—	—	4.45	STC PDIP-20
Standoff	A1	0.38	—	—	STC PDIP-20
Lead pitch	e	2.29	2.54	2.79	STC PDIP-20
Lead width	b	0.41	0.46	0.51	STC PDIP-20
Shoulder width	b1	1.47	1.52	1.63	STC PDIP-20
Lead thickness	c	0.20	0.25	0.28	STC PDIP-20
Lead length	L	3.05	3.30	3.56	STC PDIP-20
Row spacing	eA	9.02	9.02	9.53	STC PDIP-20
Lead angle	θ	0°	—	15°	STC PDIP-20

Note the row-spacing figure. STC specifies eA as the lead tip spread, which is wider than the 7.62 mm nominal hole-to-hole spacing because the leads splay outward. TI’s drawing gives the same relationship as 0.300 in (7.62 mm) at the seating plane, opening to 0.325 in (8.26 mm). Your footprint uses 7.62 mm. The wider figure is what you measure with calipers on a loose part.

Height is worth flagging separately. TI caps overall height at 0.200 in (5.08 mm) with a 0.125 in (3.18 mm) minimum standoff-to-seating-plane dimension, while the STC drawing caps it at 4.45 mm. If you are checking enclosure clearance, use the looser number.

Why body length varies between vendors

A DIP-20 is not one length. TI’s own drawing permits anything from 23.88 mm to 26.92 mm. Microchip’s PIC16F1709-I/P is listed by RS at 26.92 × 7.11 × 4.95 mm, while the ATTINY861A-PU comes in at 25.98 mm long. That is a 0.94 mm spread between two parts from the same manufacturer.

This matters for silkscreen and for keepout, not for the footprint itself. The holes land on the same grid regardless. Draw your silkscreen outline to the longest body you might fit, or you will get assembly complaints about the part overhanging its own outline.

The JEDEC MS-001 exception for 18- and 20-pin bodies

Most 300-mil plastic DIPs conform to JEDEC MS-001. The 20-pin body is a documented exception. TI’s drawing states the package falls within JEDEC MS-001 except for the 18- and 20-pin minimum body length, and that the 20-pin end-lead shoulder width is a vendor option, either half or full width.

The practical consequence: do not assume two DIP-20 parts from different vendors have identical end-lead geometry. If you are designing a tight-clearance socket or a test fixture that grips the end leads, check the specific datasheet.

For reference, the wider 600-mil family sits under a different standard. MS-011 covers PDIP at 2.54 mm pitch, 12.7 mm body width and 0.6 in row spacing, against MS-001 at 6.35 mm body width and 0.3 in row spacing.

DIP-20 pinout and pin 1 identification

Pin 1 sits at one end of the package, marked by a notch in the body, a molded dot, or a chamfered corner. Orient the package so the notch is at the top with the leads pointing away from you. Pin 1 is the upper-left lead. Numbering runs down the left side to pin 10, across, and back up the right side from pin 11 to pin 20.

Restated for a DIP-20 specifically:

• Left column, top to bottom: pins 1 through 10
• Right column, bottom to top: pins 11 through 20
• Pin 1 and pin 20 face each other across the body
• Pin 10 and pin 11 face each other at the opposite end

The counterclockwise convention holds across DIP, SOIC, QFN and BGA, with pin 1 always adjacent to the orientation indicator. That consistency is useful, but it is also the source of the most common orientation error. A frequent mistake is misidentifying pin 1 across variant packages, where the through-hole and surface-mount versions of the same device differ. A DIP-20 and a SOIC-20 of the same logic function share a pin function map but you view them from opposite reference faces when hand-soldering, so a mental flip is easy.

[IMAGE 2: Top-down DIP-20 pinout diagram with notch, pin 1 dot, and numbering 1-20 counterclockwise | alt: “DIP-20 pinout diagram showing pin 1 notch and counterclockwise pin numbering”]

Silkscreen practice: mark pin 1 with both a dot and a notch outline on the board. Assembly operators working at speed read shape faster than they read a dot, and a rotated DIP-20 is a 20-joint desolder to fix.

DIP-20 footprint: hole and pad sizing

Two numbers define the grid: 2.54 mm pitch along each row, 7.62 mm between rows. Ten holes per row. Everything else follows from lead geometry.

Work the hole size from the maximum lead dimension, not the nominal. The controlling figure is the shoulder region where the lead is thickest in cross-section, but for hole entry you size against lead width b at maximum, 0.51 mm per the STC drawing, and 0.53 mm per TI’s 0.021 in maximum. Use 0.53 mm.

Applying the IPC-2222 density levels:

• Level A: minimum hole = max lead diameter + 0.25 mm → 0.53 + 0.25 = 0.78 mm
• Level B: + 0.20 mm → 0.73 mm
• Level C: + 0.15 mm → 0.68 mm

Then the pad. Pad diameter = minimum hole size + (2 × minimum annular ring) + minimum fabrication allowance, where minimum annular ring is 0.05 mm and fabrication allowance is 0.6 mm for Level A, 0.5 mm for Level B and 0.4 mm for Level C.

Level B worked through: 0.73 + (2 × 0.05) + 0.5 = 1.33 mm pad on a 0.73 mm hole.

Round the hole up to your fabricator’s standard drill. 0.8 mm is the usual stocked size and gives comfortable insertion clearance on a 0.53 mm lead. A 1.5 mm pad on a 0.8 mm hole is a safe, manufacturable default for a general-purpose DIP-20 at IPC Class 2.

Two constraints to check before you commit:

• Aspect ratio. Keep board thickness to hole diameter under 10:1 for reliable plating. A 0.8 mm hole is fine to 8 mm of board, so this never binds on a normal 1.6 mm stackup.
• Annular ring class. IPC-6012 Class 3 requires a minimum 0.001969 in external-layer annular ring measured from the finished hole to the land edge, while Class 2 permits 90-degree breakout provided there is teardropping at the land-conductor junction. If you are building to Class 3, add margin to the pad rather than shaving the hole.

Library footprint names and the 600-mil gap

If you use KiCad, the relevant footprints are in the Package_DIP library:

• DIP-20_W7.62mm — the default
• DIP-20_W7.62mm_LongPads — extended pads for hand assembly and rework
• DIP-20_W7.62mm_Socket and _Socket_LongPads — sized for a socket rather than the bare IC
• DIP-20_W7.62mm_SMDSocket_SmallPads and DIP-20_W8.89mm_SMDSocket_LongPads — surface-mount socket variants

Here is a gap none of the reference pages mention: KiCad’s stock library contains no 600-mil DIP-20 footprint. The library carries DIP-24_W15.24mm, DIP-28_W15.24mm and larger, but the 15.24 mm series begins at 24 leads. If you have a genuine 600-mil 20-pin part, you will be modifying a footprint or drawing one. The SMDIP-20_W11.48mm entry is a surface-mount DIP at 451 mil, not a 600-mil through-hole part.

Toshiba publishes reference land pattern data for its DIP20 designed to JEITA ET-7501 Level 3, alongside STEP 3D model data, which is a useful cross-check if you want a second opinion on pad geometry.

300 mil vs 600 mil: which DIP-20 do you have?

	300 mil (7.62 mm)	600 mil (15.24 mm)
Row spacing	7.62 mm	15.24 mm
JEDEC family	MS-001	MS-011
Prevalence at 20 pins	Dominant	Rare
Typical pin counts for the family	8 to 24	24, 28, 32, 40
KiCad stock footprint	Yes, five variants	No
Breadboard	Straddles the centre channel correctly	Too wide for a standard breadboard

At 0.3 in row spacing, pin counts of 8 to 24 are common; at 0.6 in, the common counts are 24, 28, 32 and 40. A 20-pin part at 600 mil is unusual enough that you should verify it against the datasheet rather than assume.

Measuring an unknown part: span the outside of the two lead rows with calipers. A 300-mil DIP-20 reads roughly 7.6 to 8.3 mm across the leads depending on splay. A 600-mil part reads over 15 mm. There is no ambiguity between them.

Real DIP-20 parts you can still buy

Through-hole logic in 20 pins remains in active production and in stock. Verified DigiKey listings:

Part	Function	Package listing	Status	Qty-1 price	Stock
SN74HC245N (TI)	Octal bus transceiver, 3-state	20-PDIP	Active	$0.84	3,095
SN74AC245N (TI)	Octal bus transceiver, 3-state	20-DIP (0.300″, 7.62mm)	Active	$1.77	781
ATTINY861A-PU (Microchip)	8-bit AVR MCU, 8 KB flash	20-DIP (0.300″, 7.62mm)	Active	$2.02	904
SN74HCT245N (TI)	Octal transceiver, TTL-compatible inputs	20-PDIP	Active	—	—

Two sourcing notes. The SN74AC245N shows an additional 5,247 units shipping from Rochester Electronics, which is the usual signal that a part is heading toward end-of-life at the original manufacturer even while it remains listed as active. Rochester stocks authorised end-of-life inventory, so that is a legitimate second source rather than a grey-market flag, but plan a migration path.

Manufacturer standard lead time on the SN74HC245N is 6 weeks. For prototype quantities that is irrelevant; for a production build on through-hole logic it is the number that will bite you.

Price behaviour is worth knowing: the SN74HC245N drops from $0.84 at quantity 1 to $0.40938 at 1,000. Through-hole parts carry a real premium over their SOIC equivalents at volume, which is the honest argument against specifying DIP for anything you intend to manufacture.

[IMAGE 3: Photograph of a DIP-20 IC beside a 20-pin IC socket and a 300-mil footprint on bare PCB | alt: “DIP-20 package IC next to a 20-pin socket and its PCB footprint”]

Design mistakes that cause rework

• Silkscreen drawn to nominal body length. Vendor bodies range 23.88 to 26.92 mm. Draw to the maximum you might populate.
• Socket footprint used for a bare IC, or the reverse. A socket needs its own pad geometry. KiCad separates these for a reason. Mixing them gives you either a loose socket or an IC that will not seat flat.
• Hole sized from nominal lead width. Nominal is 0.46 mm; maximum is 0.53 mm. Size from maximum or a fraction of your parts will not insert.
• No standoff allowance in the thermal or clearance model. The minimum standoff is 0.020 in (0.51 mm), and the STC drawing puts A1 at 0.38 mm minimum. The body does not sit flush on the board.
• Assuming pin 1 orientation carries across package variants. The DIP and SOIC versions of the same function are viewed from different reference faces during hand assembly. Confirm against the datasheet drawing, not memory.
• Specifying 600 mil without checking the library. As above, most tools do not ship a 600-mil DIP-20. Discovering this at layout time costs an afternoon.

Frequently asked questions

What is a DIP-20 package?

A 20-lead dual in-line package with ten through-hole leads per side on 2.54 mm pitch, rows separated by 7.62 mm in the standard variant. The plastic version is called PDIP-20. It mounts through plated holes or into an IC socket, and remains common for prototyping and repairable equipment.

What are the dimensions of a DIP-20?

Pitch is 2.54 mm, row spacing 7.62 mm, body width about 6.35 mm, and overall height under 5.08 mm. Body length varies by vendor between roughly 23.9 mm and 26.9 mm, so check the specific datasheet if the length matters for clearance.

Is DIP-20 the same as PDIP-20?

In practice yes. PDIP specifies a plastic body, distinguishing it from ceramic DIP (CDIP). Distributors and datasheets use DIP-20, DIP20, 20-DIP and 20-PDIP for the same footprint. Ceramic versions exist for high-reliability and military parts but are rare at 20 pins.

How do I identify pin 1 on a DIP-20?

Look for a notch, molded dot, or chamfer at one end. With the notch at the top and the leads pointing away, pin 1 is the upper-left lead. Numbering runs counterclockwise: down the left to pin 10, then up the right from 11 to 20.

What hole size should I use for a DIP-20 footprint?

Size from the 0.53 mm maximum lead width. IPC-2222 Level B gives 0.73 mm minimum; Level A gives 0.78 mm. Round to a standard 0.8 mm drill with a 1.5 mm pad for a manufacturable Class 2 default.

Are DIP-20 packages still used in new designs?

Yes, in prototyping, education, field-repairable equipment, and low-volume industrial products where socketing matters. Active parts remain in stock at major distributors. For volume production, the SOIC-20 equivalent is cheaper and smaller.

What to do next

If you are placing a footprint and the part is a standard logic or MCU device, use the 7.62 mm library footprint and stop there. The default is correct for the overwhelming majority of 20-pin DIPs.

Cut a custom footprint only in three cases: you have a verified 600-mil part, in which case you will be drawing it yourself since the stock libraries do not carry one; you are building to IPC Class 3 and need annular ring margin beyond the library default; or you are socketing, in which case use the socket-specific variant rather than the bare-IC footprint.

Before release, check three numbers against the actual datasheet rather than this page or any other: maximum body length for your silkscreen, maximum lead width for your drill, and row spacing. Those three are where vendor variation lives, and they are the three that turn into a board respin.