The DIP-14 package is a 14-pin dual in-line through-hole IC housing with 300 mil (7.62 mm) row spacing, 2.54 mm pin pitch, and a body length of approximately 19 mm. It conforms to JEDEC standard MS-001 and is one of the most widely used DIP sizes, housing the 74xx logic family, quad op-amps (LM324), and many other classic ICs. This reference covers every dimension you need for PCB footprint design, along with pin numbering rules and common ICs in this package.
Key Takeaways
JEDEC MS-001 defines the DIP-14 outline. Pin pitch: 2.54 mm (100 mil). Row spacing: 7.62 mm (300 mil). Body width: 6.35 mm (0.25”). Body length: ~19.05 mm (0.750”).
Pin 1 is at the upper left when the notch or dot faces up. Pins number counterclockwise: 1–7 down the left side, 8–14 up the right side.
The SMD equivalent of DIP-14 is SOIC-14 (1.27 mm pitch, 3.9 mm body width per JEDEC MS-012). SOIC-14 occupies roughly half the board area.
DIP-14 fits standard breadboards directly. The 2.54 mm pitch matches breadboard hole spacing, and the 300 mil row spacing straddles the center channel.
DIP-14 Package Dimensions
| Dimension | Symbol | Value (mm) | Value (inches) | Source |
| Pin pitch | e | 2.54 | 0.100 | JEDEC MS-001 |
| Row spacing (lead span) | E | 7.62 | 0.300 | JEDEC MS-001 |
| Body width | E1 | 6.35 | 0.250 | NXP SOT27-1, PCB-3D |
| Body length | D | 19.05 (typ.) | 0.750 | Grokipedia, NXP |
| Body height (max) | A | 4.2 (NXP) / 5.33 (PCB-3D) | 0.165 / 0.210 | NXP SOT27-1, PCB-3D |
| Lead width | b | 0.36–0.56 | 0.014–0.022 | Analog Devices N-14 |
| Lead thickness | c | 0.20–0.38 | 0.008–0.015 | Analog Devices N-14 |
| Seating plane to lead tip | L | ~3.3 | ~0.130 | Analog Devices N-14 |
| Socket width | 10.16 | 0.400 | petervis.com | |
| Socket length | 17.78 | 0.700 | petervis.com |
Sources: JEDEC MS-001 (controlling standard), NXP SOT27-1 DIP14 package listing, Analog Devices N-14 package drawing, PCB-3D JEDEC DIP naming convention, petervis.com DIP-14 socket dimensions, Grokipedia DIP body length data. Dimensions vary slightly between manufacturers; always verify against the specific IC datasheet.
[IMAGE 1: Dimensioned top-view and side-view drawing of a DIP-14 package showing body length, body width, row spacing, pin pitch, and lead dimensions | alt: “DIP-14 package dimensions showing body length width row spacing and pin pitch per JEDEC MS-001”]
DIP-14 Pin Numbering
Pin numbering on the DIP-14 follows the standard DIP convention:
1. Orient the IC with the notch (or dot) at the top, facing you.
2. Pin 1 is at the upper left corner.
3. Pins count downward along the left side: pin 1 through pin 7.
4. At the bottom, numbering crosses to the right side: pin 8 is directly opposite pin 7.
5. Pins count upward along the right side: pin 8 through pin 14.
Pin 14 is directly opposite pin 1. On most 14-pin logic ICs, pin 14 is VCC and pin 7 is GND. This convention is shared by the 7400 series, 4000 series CMOS, and many op-amps—but always confirm the specific part’s datasheet, as exceptions exist.
[IMAGE 2: DIP-14 pinout diagram showing pin 1 through 14 numbered counterclockwise with notch at top, VCC on pin 14, GND on pin 7 | alt: “DIP-14 pinout diagram showing counterclockwise pin numbering with notch marker”]
DIP-14 PCB Footprint Design
The DIP-14 PCB footprint consists of 14 plated through-holes arranged in two rows of 7, on a 2.54 mm grid with 7.62 mm row spacing. Per IPC-7253 (the DIP sub-standard within IPC-7251):
Drill hole: finished diameter = max lead width + 0.20 to 0.35 mm. For 0.56 mm max lead width, this gives 0.76–0.91 mm. A 0.80 mm finished hole is typical for Level B (standard producibility).
Pad diameter: hole + 1.2 to 1.6 mm. For a 0.80 mm hole, Level B gives a 2.20 mm circular pad.
Courtyard: extends 0.5–1.0 mm beyond the outermost pad edge, depending on density level.
Silkscreen: outline the body (6.35 × 19.05 mm) with a pin 1 indicator (notch or dot) at one end.
Most EDA tools (KiCad, Altium, Eagle) include a DIP-14 footprint in their default libraries. Verify it matches JEDEC MS-001 before using—some library footprints use non-standard pad sizes or incorrect body outlines.
Common ICs in the DIP-14 Package
| IC | Function | Manufacturer(s) |
| 7400 / 74HC00 | Quad 2-input NAND gate | TI, Nexperia, ON Semi |
| 7402 / 74HC02 | Quad 2-input NOR gate | TI, Nexperia |
| 7404 / 74HC04 | Hex inverter | TI, Nexperia, ON Semi |
| 7408 / 74HC08 | Quad 2-input AND gate | TI, Nexperia |
| 7432 / 74HC32 | Quad 2-input OR gate | TI, Nexperia |
| 7486 / 74HC86 | Quad 2-input XOR gate | TI, Nexperia |
| LM324 | Quad op-amp | TI, ON Semi, STMicroelectronics |
| LM339 | Quad comparator | TI, ON Semi, STMicroelectronics |
| CD4001BE | Quad 2-input NOR (CMOS) | TI |
| CD4011BE | Quad 2-input NAND (CMOS) | TI |
| NE556 | Dual timer | TI, ON Semi |
All parts listed are actively available in DIP-14 from major distributors as of 2026. Verify current lifecycle status before designing in.
DIP-14 vs SOIC-14
The surface-mount equivalent of DIP-14 is SOIC-14 (JEDEC MS-012). SOIC-14 has 1.27 mm pitch, 3.9 mm body width, and roughly 50% less board area. For any design heading to volume production, SOIC-14 reduces PCB cost (no drilled holes) and assembly cost (reflow vs wave solder). DIP-14 is preferred when breadboard compatibility, socketed IC replacement, or hand soldering is needed.
Frequently Asked Questions
What are the dimensions of a DIP-14 package?
A DIP-14 package has a 2.54 mm (100 mil) pin pitch, 7.62 mm (300 mil) row spacing, 6.35 mm body width, and approximately 19 mm body length per JEDEC MS-001. Body height varies by manufacturer but is typically 4.2–5.3 mm.
What is pin 1 on a DIP-14?
Pin 1 is at the upper left corner when the notch or dot on the package faces up. Pins count counterclockwise: 1–7 down the left, 8–14 up the right. Pin 14 is opposite pin 1. On most 14-pin logic ICs, pin 14 is VCC and pin 7 is GND.
Does a DIP-14 fit on a breadboard?
Yes. The 2.54 mm pin pitch and 300 mil row spacing match standard solderless breadboard dimensions exactly. Insert the DIP-14 straddling the center channel, with each row of 7 pins in separate breadboard columns.
What is the SMD equivalent of DIP-14?
The surface-mount equivalent is SOIC-14 (JEDEC MS-012), with 1.27 mm pitch and 3.9 mm body width. It occupies roughly half the board area of DIP-14 and eliminates the need for drilled PCB holes.
Using the DIP-14 Footprint Correctly
Match your EDA library footprint to JEDEC MS-001: 14 holes on a 2.54 mm grid, 7.62 mm row spacing, 0.80 mm finished hole diameter (Level B), 2.20 mm pad. Confirm the body outline is 6.35 × 19.05 mm with a pin 1 marker. If your design is heading to production, confirm the IC is still available in DIP-14 before committing—many logic parts have migrated to SOIC or TSSOP only.
