Three quad flat packages show up on most microcontroller and FPGA schematics: LQFP, TQFP, and PQFP. They look alike — gull-wing leads on all four sides — but they differ in body thickness, footprint, lead finish, and thermal ceiling. This guide compares the QFP package types you actually specify, with dimensions and thermal numbers pulled from JEDEC outlines and production datasheets, so you can choose without guesswork.

Key takeaways

• LQFP (1.4 mm body) and TQFP (1.0 mm body) are both registered under JEDEC outline MS-026 and can share the same PCB land pattern.
• PQFP is the older, thicker family (2.0–3.8 mm); it does not drop into an LQFP or TQFP footprint.
• Lead pitch runs 0.4 mm to 1.0 mm; below 0.65 mm, hand-soldering and lead coplanarity get harder.
• Leaded QFPs are thermally limited: an STM32F103 in LQFP48 is rated for 363 mW at 85 °C, versus 624 mW for the exposed-pad QFN version of the same die.
• Legacy PQFP parts — common on older FPGAs and CPLDs — are usually tin-lead and not rated for 260 °C lead-free reflow, a real sourcing trap.

What QFP means

QFP stands for quad flat package: a surface-mount body with gull-wing (L-shaped) leads on all four sides, numbered counter-clockwise from a corner index dot. Common lead pitches are 0.4, 0.5, 0.65, and 0.8 mm, and the family spans roughly 32 to 300-plus leads. That range is why QFP still covers most 8- to 32-bit MCUs, CPLDs, and mid-density FPGAs.

The letters in front of “QFP” describe the body, not the electrical function. L means low-profile, T means thin, P means plastic, C means ceramic. That prefix is what separates the three packages below.

[IMAGE 1: side-profile cross-section of LQFP (1.4 mm), TQFP (1.0 mm) and PQFP (3.4 mm) showing body height and lead standoff | alt: “QFP package types side-profile comparison of LQFP, TQFP and PQFP body thickness”]

LQFP vs TQFP vs PQFP: the parametric comparison

The table gives the working differences. Values are nominal and reflect JEDEC registered outlines and typical vendor data; always confirm against the specific part’s datasheet.

Attribute	LQFP	TQFP	PQFP (legacy)
Full name	Low-profile QFP	Thin QFP	Plastic QFP (often bumpered)
Body thickness	1.4 mm	1.0 mm	2.0–3.8 mm (208-lead: 3.4 mm)
JEDEC outline	MS-026	MS-026	MS-022 / older
Typical pitch	0.4–0.8 mm	0.4–0.8 mm	0.5–1.0 mm
Typical lead count	32–256	32–176	44–304
Body sizes	7×7 to 28×28 mm	5×5 to 20×20 mm	14×20 to 28×28 mm+
Footprint sharing	Interchanges w/ TQFP	Interchanges w/ LQFP	Separate footprint
Lead finish era	RoHS/Pb-free common	RoHS/Pb-free common	Often tin-lead (legacy)
Where you see it	MCUs, CPLDs, mid FPGAs	Space-constrained MCUs	Older FPGAs, CPLDs, ASICs

Per JEDEC Publication 95, LQFP and TQFP are registered together under outline MS-026, which defines plastic quad flat packs at 1.0 mm and 1.4 mm nominal thickness on a 2 mm footprint. The metric/bumpered plastic QFP family sits under MS-022, and fine-pitch QFP under MS-029. Almost none of the popular explainer pages cite these outline numbers, yet they are exactly what a footprint library keys on.

Body thickness and footprint: why LQFP and TQFP interchange but PQFP doesn’t

Because MS-026 covers both the 1.0 mm and 1.4 mm bodies with the same lead layout, an LQFP and a TQFP of matching lead count and pitch present the same land pattern. TQFP leads are marginally shorter and the body is thinner; the copper footprint is identical. In practice, which one you receive is often a supply-chain accident — many vendors default to LQFP for standard MCUs — rather than a deliberate design choice.

PQFP is different. It predates the low-profile registrations, uses a thicker molded body, and frequently adds corner bumpers to protect the fine leads during handling. A 208-lead PQFP measures 28×28 mm with a 3.4 mm body and 0.5 mm pitch, per Microchip’s legacy package drawing for that outline — more than twice the height of a 1.4 mm LQFP. You cannot reflow a PQFP onto an LQFP land pattern; the lead span and standoff differ.

For scale, an STM32F103 (ST datasheet DS5319) ships as LQFP48 at 7×7 mm, LQFP64 at 10×10 mm, and LQFP100 at 14×14 mm, all on 0.5 mm pitch. A 208-lead PQFP is in a different size class entirely.

Lead pitch, pin count, and routing density

Pitch drives both pin count and manufacturability. Dropping from 0.65 mm to 0.5 mm to 0.4 mm packs more I/O into the same body but tightens every downstream tolerance: stencil aperture, placement accuracy, and inspection. Multiple vendor guides note that below 0.65 mm pitch, leads bend more readily and coplanarity becomes the limiting yield factor. JEDEC caps QFP lead coplanarity at roughly 0.10 mm for exactly this reason.

[IMAGE 2: top-down QFP showing pin-1 index dot, counter-clockwise numbering and a lead-pitch callout | alt: “QFP lead pitch and pin-1 index dot orientation”]

QFP keeps every lead on the perimeter, so you can escape-route all pins on one or two layers without via-in-pad — the reason designers still pick QFP over BGA for low-layer-count boards. Against QFN, QFP trades board area and height for easier hand rework and visible solder joints, which matters for prototypes, low-volume builds, and field repair.

[INTERNAL LINK: QFN vs QFP -> QFN and QFP trade-offs for MCU and FPGA designs]

Thermal reality: what the datasheet actually says

Leaded QFPs move heat through their leads, not through a pad, so their thermal ceiling is modest. The numbers matter more than the marketing.

Take one die, the STM32F103, across its packages (ST datasheet DS5319, maximum power dissipation at 85 °C ambient, with a 105 °C junction limit for the standard grade):

Package	Body	Max PD at 85 °C	Implied θJA
LQFP100	14×14 mm	434 mW	~46 °C/W
LQFP64	10×10 mm	444 mW	~45 °C/W
LQFP48	7×7 mm	363 mW	~55 °C/W
UFQFPN48 (QFN)	7×7 mm	624 mW	~32 °C/W

The exposed-pad QFN version of the same silicon dissipates roughly 70% more power in the same 7×7 mm footprint, because its pad conducts heat into the board. If your design is thermally tight, that gap is the argument for QFN, or for adding copper pour and airflow around a QFP.

Worked example: to hold a 130 °C junction on an LQFP48 (θJA ≈ 55 °C/W) inside a 60 °C enclosure, allowable dissipation is (130 – 60) / 55 ≈ 1.27 W — but only if the board matches the JEDEC test card. On a small board with thin copper, real θJA runs higher, so derate hard.

The PQFP sourcing trap

This one bites FPGA and industrial engineers maintaining older boards. Many mid-density FPGAs and CPLDs shipped only in PQFP — for example, Altera’s FLEX 10K in the 208-lead PQFP (EPF10K10QC208 and relatives) and Xilinx devices in the PQ208 outline.

Two problems follow. First, those legacy parts are typically tin-lead and not rated for 260 °C lead-free reflow — distributor data for the EPF10K family flags them as not 260 °C peak-reflow compatible. Dropping one into a modern lead-free line risks internal damage. Second, PQFP inventory is thinning, so a rebuild often means redesigning to a BGA or QFN successor rather than a like-for-like swap.

If you’re sourcing a legacy PQFP, confirm the lead finish, the moisture rating, and a viable second source before you commit the layout.

[INTERNAL LINK: FPGA package selection -> choosing between PQFP, QFN and BGA for FPGAs]

Compliance and handling: RoHS, MSL, and AEC-Q100

Modern LQFP and TQFP parts are RoHS/REACH compliant and lead-free. Legacy PQFP may not be — check the specific orderable part number.

All plastic QFPs are moisture-sensitive. Under IPC/JEDEC J-STD-020, large QFPs are commonly rated MSL 3, which allows 168 hours of floor life at 30 °C / 60% RH after the dry-pack is opened. The standard’s 260 °C peak reflow applies to bodies under 2.5 mm; thicker packages — a 3.4 mm PQFP included — reflow at a lower peak temperature. Exceed the floor life and you bake per J-STD-033 or risk “popcorn” cracking.

For automotive work, specify AEC-Q100-qualified parts and confirm the grade’s temperature range. The package outline alone does not guarantee qualification.

[INTERNAL LINK: MSL handling -> moisture sensitivity level and reflow handling guide]

Choosing a QFP package: a decision path

[IMAGE 3: decision flowchart routing height, footprint reuse, legacy status and thermals to LQFP / TQFP / PQFP / QFN | alt: “Decision path for choosing between LQFP, TQFP and PQFP package types”]

Work through it in this order:

1. Start from the part, not the package. Most MCUs and FPGAs offer a fixed short list; pick the die first, then see which bodies it comes in.
2. If height is constrained (below roughly 1.2 mm), choose TQFP; otherwise LQFP is the default and usually the better-stocked option.
3. If you need the same footprint across a family, confirm both candidates fall under MS-026 — then LQFP and TQFP interchange cleanly.
4. If the only option is PQFP, treat it as a legacy/obsolescence decision: verify lead finish, MSL, stock, and a second source.
5. If power or thermals are tight, put the QFP’s datasheet θJA next to the exposed-pad (QFN) or BGA alternative before you lock the package.

Design mistakes that cause returns

• Reusing an LQFP land pattern for a PQFP (or the reverse) because the pin counts matched. Footprints differ — check the outline.
• Ignoring lead coplanarity on sub-0.65 mm pitch parts, which surfaces as opens after reflow.
• Running a legacy tin-lead PQFP through a 260 °C lead-free profile.
• Skipping the moisture-bake step after floor-life expiry on large QFPs.
• Under-coppering a QFP that sits near its thermal limit, then blaming the silicon.

FAQ

What is the difference between LQFP and TQFP?

Body thickness and lead length. LQFP has a 1.4 mm body; TQFP is thinner at 1.0 mm with slightly shorter leads. Both fall under JEDEC MS-026 and, at the same lead count and pitch, share a PCB footprint. Vendors often default to LQFP, so availability, not design, usually decides which you use.

What does PQFP stand for?

PQFP means plastic quad flat package — a QFP with a molded plastic body, historically thicker (2.0–3.8 mm) than low-profile types and often fitted with corner bumpers to protect the leads. It predates LQFP and TQFP and is common on older FPGAs, CPLDs, and ASICs. It uses a taller, different footprint than LQFP or TQFP.

Do LQFP and TQFP share the same footprint?

Usually yes. Because JEDEC MS-026 registers both the 1.0 mm and 1.4 mm bodies with the same lead layout, an LQFP and TQFP of matching lead count and pitch present the same land pattern. The TQFP is simply thinner with marginally shorter leads. Confirm against both datasheets before reusing a footprint.

What is the maximum thickness of a QFP package?

Low-profile and thin types top out at 1.4 mm (LQFP) and 1.0 mm (TQFP). Older plastic QFPs run thicker — 2.0 to 3.8 mm — with the common 208-lead PQFP at 3.4 mm per Microchip’s package drawing. If height matters, treat 1.4 mm as the practical QFP ceiling and look to TQFP or QFN below that.

Is QFP better than QFN or BGA?

It depends on the constraint. QFP wins on hand-rework, visible joints, and low-layer routing, which suits prototypes and repairable boards. QFN saves height and moves more heat through an exposed pad. BGA gives the highest pin density but needs via-in-pad and X-ray inspection. Match the package to board area, thermals, and assembly capability.

What pin pitches do QFP packages use?

Common QFP pitches are 0.4, 0.5, 0.65, and 0.8 mm, with some older PQFPs at 1.0 mm. Finer pitch fits more I/O in the same body but tightens stencil, placement, and inspection tolerances. Below 0.65 mm, coplanarity and lead bending become the main yield risks, so plan the stencil and process accordingly.

The bottom line

Default to LQFP for new designs: it’s the best-stocked QFP, RoHS-compliant, and reworkable. Drop to TQFP only when height forces it, and confirm both share MS-026 so the footprint carries over. Reserve PQFP for legacy boards you must keep alive — and when you meet one, verify lead finish, moisture rating, and second source before you route. When power gets tight, put the QFP’s datasheet θJA next to a QFN or BGA before you commit the package.