Pitch is the master variable in package selection: it sets how many pins fit, whether you can hand-solder the part, and whether the board needs HDI. This IC package pitch chart runs from the 1.27 mm of a classic SOIC down to the 0.3 mm of an ultra-fine BGA, mapping each pitch to the package families that use it and — the part the other charts skip — the assembly consequence you inherit by choosing it.
Key takeaways
- Pitch is the center-to-center spacing between adjacent leads, pads, or balls — the number that drives density and manufacturability.
- The standard ladder is 1.27, 0.8, 0.65, 0.5, 0.4, and 0.3 mm; each step roughly doubles routing difficulty.
- 0.65 mm is the practical hand-solder floor; below it, reflow is strongly recommended (Keszoox, industry practice).
- BGA pitch ≤0.5 mm makes via-in-pad mandatory — dog-bone fan-out no longer fits between balls (AtlasPCB, TI).
- 0.4 mm and 0.3 mm demand HDI with laser microvias of 0.075–0.10 mm and 0.05–0.075 mm respectively.
- A 0.65 mm QFP can reach a maximum of about 304 pins (multiple package references).
What package pitch is
What is pin pitch in an IC package? Pin pitch is the center-to-center distance between two adjacent leads, pads, or solder balls on a package. It is measured in millimeters, and it is the single spec that most directly sets a package’s pin density, its footprint, and how hard it is to fabricate and assemble.
Two packages with the same body can carry very different pin counts depending on pitch, and two parts at the same pitch — a leaded QFP and a balled BGA — share the same assembly class even though they look nothing alike. That is why pitch, not package name, is the right axis to organize by. Coarser pitch means easier assembly and fewer pins; finer pitch means more pins in less space at the cost of tighter fabrication and no hand rework.
The master pitch chart
The chart below maps each standard pitch to the package families that use it and the assembly reality that comes with it.
| Pitch | Typical families | Assembly reality |
| 1.27 mm | SOIC (SO), PLCC, SOJ, 1.27 mm BGA | Easy hand-solder; simple 2-layer routing |
| 0.8 mm | LQFP, larger BGA/CSP | Hand-solderable with care; standard routing |
| 0.65 mm | SSOP, TSSOP, QFP, some QFN | Practical hand-solder floor; reflow preferred |
| 0.5 mm | QFP, QFN, DFN, BGA/CSP | Reflow; BGA needs via-in-pad |
| 0.4 mm | Fine-pitch QFN, BGA/CSP | Reflow only; HDI microvias required |
| 0.3 mm | Ultra-fine BGA/CSP, WLCSP | Advanced HDI; via-in-pad + laser microvias |
[IMAGE 1: side-by-side pad-spacing diagram from 1.27 mm to 0.3 mm with a hand-solder / reflow / HDI band overlaid | alt: “IC package pitch chart from 1.27 mm to 0.3 mm with hand-solder reflow and HDI assembly bands”]
The coarse end: 1.27–0.8 mm
The 1.27 mm (50 mil) pitch is the comfortable end of the range. It defines the classic SOIC, PLCC, and SOJ families, and it is easy to hand-solder with a fine-tip iron and routine on a two-layer board. SOIC comes in narrow (3.9 mm) and wide (7.5 mm) bodies, both at 1.27 mm pitch, which is why it remains the default for op-amps, logic, and interface ICs.
At 0.8 mm, density climbs but the part stays manageable. This is common for LQFP and for larger-pitch BGA and CSP parts. An experienced hand can still solder 0.8 mm leaded packages, and standard PCB fabrication handles the routing without special processes. This band covers most general-purpose microcontrollers and mid-pin-count logic.
The fine-pitch middle: 0.65–0.5 mm
0.65 mm is the pivot point. It defines SSOP, TSSOP, many QFPs, and some QFN parts, and it is widely regarded as the practical floor for hand soldering — most experienced engineers can manage 0.65 mm leaded packages with flux and a fine tip. A 0.65 mm QFP can carry up to roughly 304 pins, the high end for that pitch. Below this pitch, plan on reflow.
0.5 mm moves firmly into reflow territory. It is the workhorse fine pitch for QFP, QFN, DFN, and a large share of BGA and CSP parts. Leaded 0.5 mm parts are assemblable on standard lines, but the moment the package is a BGA, the routing rules change: at 0.5 mm ball pitch, via-in-pad becomes mandatory because there is no room for a dog-bone fan-out between balls. TI’s 0.5 mm BGA guidance pairs a 0.3 mm ball with a ~0.25 mm NSMD pad, leaving an 82 µm trace-and-space channel between pads.
Ultra-fine: 0.4–0.3 mm
0.4 mm is where HDI stops being optional. Escape-routing channels between pads are too narrow for conventional vias, so the design needs laser microvias, typically 0.075–0.10 mm in diameter, plated to at least 20 µm copper and filled per IPC-4761 Type VII. IPC guidance also warns against routing any trace between 0.4 mm pads and against NSMD pads at this pitch, since bridging and pad peeling become real risks.
0.3 mm is the ultra-fine extreme, found on WLCSP and the densest BGA/CSP parts in smartphones and wearables. It demands advanced HDI with laser microvias around 0.05–0.075 mm, via-in-pad, and an aspect ratio held at or below 0.75:1 to keep the plating sound. IPC-7351A recommends a 0.25 mm NSMD pad for a 0.3 mm ball, and fabrication tolerances tighten to the point that solder-mask misregistration alone can make a design unmanufacturable. This pitch belongs only to advanced HDI shops.
The assembly breakpoints that actually matter
Pitch is really a proxy for three hard thresholds. Cross one and your process changes.
| Breakpoint | Threshold | What changes |
| Hand-solder limit | ~0.65 mm | Below it, reflow strongly recommended |
| Reflow / standard fab | 0.5 mm | Standard SMT; BGA needs via-in-pad |
| HDI required | 0.4 mm | Laser microvias; no trace between pads |
| Advanced HDI | 0.3 mm | Via-in-pad + microvias; ≤0.75:1 aspect ratio |
A QFN, incidentally, is not hand-solderable at any pitch because of its hidden thermal pad — pitch is not the only thing that forces reflow. And a leaded package is more forgiving than a balled package at the same pitch, because leads fan out on the surface while balls must escape through vias.
A pitch-driven selection decision path
Work from your assembly capability inward:
- Hand assembly or prototype bench → stay at 1.27 or 0.8 mm (SOIC, LQFP); 0.65 mm only with skill.
- Standard SMT line, two-to-four layers → 0.65–0.5 mm leaded parts (TSSOP, QFP, QFN) are comfortable.
- BGA at 0.5 mm → budget for via-in-pad and NSMD pads; confirm your fab’s capability first.
- 0.4 mm → commit to HDI: laser microvias, filled and capped, no traces between pads.
- 0.3 mm → advanced HDI only; involve the fab and assembly house before finalizing the layout.
Common fine-pitch mistakes
The failures cluster where designers carry coarse-pitch habits into fine-pitch parts. Routing a trace between 0.4 mm pads invites bridging and is explicitly discouraged by IPC. Using NSMD pads at 0.4 mm can cause both bridging and pad peeling during reflow because there is no solder-mask webbing for grip. Attempting a dog-bone fan-out on a 0.5 mm BGA wastes days before the realization that via-in-pad was mandatory. And specifying a 0.3 mm part without confirming the fab can hold a 0.75:1 microvia aspect ratio produces a beautiful layout no one can build. Each is avoided by reading the pitch as an assembly spec, not just a dimension.
Frequently asked questions
What is pin pitch in an IC package?
Pin pitch is the center-to-center distance between two adjacent leads, pads, or solder balls, measured in millimeters. It sets the package’s pin density and footprint and largely determines how difficult the part is to fabricate and assemble. Standard pitches run from 1.27 mm down to 0.3 mm.
What is the smallest IC package pitch?
Among mainstream parts, 0.3 mm is the ultra-fine extreme, used on WLCSP and the densest BGA and CSP packages in smartphones and wearables. It requires advanced HDI with laser microvias around 0.05–0.075 mm and via-in-pad. Some specialized wafer-level parts go finer, but 0.3 mm is the practical floor for board-level assembly.
What pitch can you hand-solder?
About 0.65 mm is the practical floor for hand soldering a leaded package, with a fine-tip iron and flux. Below 0.65 mm — 0.5 mm LQFP, 0.4 mm QFN — reflow is strongly recommended. QFN packages are not reliably hand-solderable at any pitch because of the hidden thermal pad.
Does a 0.4 mm BGA need HDI?
Yes. At 0.4 mm ball pitch there is no room for a conventional dog-bone fan-out, so the design needs HDI with laser microvias (typically 0.075–0.10 mm), via-in-pad, and filled, capped vias per IPC-4761 Type VII. Routing a trace between adjacent pads is discouraged at this pitch.
What is the standard SOIC pitch?
Standard SOIC (small outline integrated circuit) has a 1.27 mm (50 mil) lead pitch, the same as its JEITA-named counterpart SOP. It is the coarsest common SMD pitch, easy to hand-solder and simple to route on a two-layer board, which is why SOIC remains a default for analog and logic ICs.
Bottom line
Read pitch as an assembly spec, not just a dimension. Stay at 1.27–0.8 mm when you need hand assembly, treat 0.65 mm as the hand-solder floor, and expect reflow at 0.5 mm. Once a BGA drops to 0.5 mm, via-in-pad is mandatory; at 0.4 mm and 0.3 mm, HDI with laser microvias is the price of entry. Match the pitch to the capability of the line and fab that will actually build the board, and the chart above turns from a reference into a go/no-go decision.
