A PLCC (plastic leaded chip carrier) is a square or rectangular surface-mount IC package with J-shaped leads on all four sides, spaced at a fixed 1.27 mm pitch under JEDEC outlines MO-047 and MO-052. It solders directly to a board or drops into a socket, which is the main reason it is still specified on CPLDs, parallel EEPROMs, and a handful of 8051-family microcontrollers decades after QFP and BGA took over new designs. This guide covers the dimensions, how to pick a PLCC footprint against the alternatives, and how to check whether a given PLCC part is still in production before you commit a BOM.

Key takeaways

• Lead pitch is fixed at 1.27 mm (0.05 in) across every JEDEC PLCC outline — it never changes with pin count.
• Two JEDEC families cover it: MO-047 for square bodies (20–84 leads) and MO-052 for rectangular bodies.
• PLCC44 is the size most likely to appear in an active design today, mainly on CPLDs and parallel memory.
• Lifecycle status varies by part, not by package: some PLCC-housed logic is still Active, some is Obsolete — check per part number.
• A typical PLCC socket contact is rated around 1 A and 100 VAC, phosphor bronze with tin-over-nickel plating.

What a PLCC Package Actually Is

PLCC stands for plastic leaded chip carrier — a molded-plastic surface-mount package that carries an IC die and brings its connections out on J-shaped leads running around all four edges. A premolded version reached the market in 1976 but saw little adoption; Texas Instruments’ later postmolded variant is the one that stuck, and most major semiconductor makers had adopted it by the early 1980s. It was positioned as a lower-cost alternative to the ceramic leadless chip carrier (CLCC/LCC), trading the ceramic package’s hermeticity for a plastic body that is cheaper to mold and easier to socket.

Lead Geometry and Construction

The defining feature is the J-lead: a metal strip that wraps around and folds back under the package edge, forming a cross-section that looks like the letter J. Because the lead folds inward instead of extending outward like a QFP’s gull-wing lead, a PLCC needs less board area than a gull-wing part with the same pin count and pitch — and the folded lead is mechanically stiffer, which is why PLCC parts tolerate socket insertion and removal better than fine-pitch gull-wing packages. Inside the body, the leads connect to the die through a lead frame, typically pure copper or a copper alloy, that also anchors the die mechanically.

JEDEC Outlines and Dimensions

Every PLCC outline is JEDEC-registered. The task force that defined them started in 1981; MO-047 (square bodies) was released in 1984 and MO-052 (rectangular bodies) followed in 1985. Two concrete data points from the standard drawings:

Package	JEDEC outline	Leads	Body span	Lead pitch
PLCC20	MO-047-AA	20	7.37–8.38 mm (0.290–0.330 in), lead-tip to lead-tip	1.27 mm BSC
PLCC28	MO-047-AB	28	12.32–12.57 mm (0.485–0.495 in) square	1.27 mm BSC
PLCC32	MO-052-AE	32	14.86 × 12.32 mm to 15.11 × 12.57 mm (rectangular)	1.27 mm BSC

Across the full family, JEDEC-registered PLCC bodies run from about 0.35 in to 1.15 in (8.9 mm to 29.2 mm) per side, with lead counts from 20 to 84. Always pull the specific outline variant (the letter suffix — AA, AB, AC…) from the manufacturer’s datasheet rather than assuming a pin count maps to one fixed body size; several sizes can share a pin count depending on square vs. rectangular and heat-spreader vs. standard construction.

PLCC vs. QFP vs. LCC vs. BGA

PLCC sits between older through-hole chip carriers and the higher-density packages that replaced it. The comparison that actually drives a package decision:

Package	Lead type	Socketable	Best fit	Main limitation
PLCC	J-lead, 1.27 mm pitch	Yes — through-hole or SMT sockets	Field-swappable CPLDs, EEPROMs, bring-up boards	Capped at 84 leads; weaker thermal path than QFP/BGA
QFP	Gull-wing, 0.4–1.0 mm pitch	Rare	High pin-count logic, MCUs, comms ICs	Leads bend easily in handling; needs careful pick-and-place
LCC / CLCC	Leadless castellations, ceramic	Yes, in some hermetic sockets	Mil/aero, hermetic requirements	Costs more than PLCC for the same pin count
BGA	Solder balls under the body	No	High-density, high-speed devices	No visual solder inspection; X-ray needed

Compared with BGA and QFP, PLCC dissipates heat less efficiently, and its longer signal paths combined with a lower maximum pin count make it a poor fit for high-speed interfaces. That is the direct reason new high-pin-count designs moved to QFP and then BGA rather than scaling the PLCC family past 84 leads. On the QFP side, NXP’s HDQFP package — which combines PLCC-style J-leads with QFP gull-wing leads on the same body — claims up to a 47% footprint reduction versus a comparable LQFP while matching its thermal and electrical performance, which gives a sense of how much board area a PLCC-class J-lead layout costs relative to modern fine-pitch alternatives.

Choosing PLCC: A Decision Path

• Bring-up or low-volume board where you need to pull and reprogram a CPLD, EEPROM, or battery-backed SRAM by hand → socketed PLCC.
• Production volume in the thousands and board area or thermal margin is tight → check whether the same die ships in QFP or BGA before locking the footprint.
• Repairing or cloning a legacy board (arcade, industrial, avionics) that only exists in PLCC → PLCC is the only option; budget extra time for socket sourcing and counterfeit screening (below).
• New design with no legacy constraint and pin count under ~50 → QFP will almost always route and reflow more predictably than PLCC.

Socket and Solder Considerations

A representative PLCC socket — the RS PRO 1.27 mm-pitch SMT-to-through-hole series — uses phosphor bronze contacts plated tin over nickel, rated 1 A and 100 VAC per contact, with a minimum insulation resistance of 1,000 MΩ, and it conforms to JEDEC MS-016/MS-018 pin-count standards. That current rating matters for anything beyond signal-level use: if a PLCC-housed part is switching load current through more than one or two pins in parallel, check the socket’s per-contact rating against your worst-case current, not just the IC’s own pin rating.

Worked example: on the 20-lead outline (MO-047-AA), the lead width runs 0.33–0.53 mm. At the fixed 1.27 mm pitch, that leaves a minimum 0.74 mm gap between adjacent lead edges (1.27 mm − 0.53 mm). Drawing a solder pad wider than the 0.53 mm maximum lead width — 0.6–0.7 mm is typical — keeps a hand-soldered joint fully inspectable without bridging the next pad, while still leaving clearance inside that 0.74 mm gap for solder mask and silkscreen.

Lifecycle: Which PLCC Parts Are Still in Production

Lifecycle status tracks the part number, not the package. Three real examples make the range visible: the Xilinx XC9572-15PC44C CPLD in PLCC44 is listed as Obsolete on Octopart’s lifecycle field. Microchip’s ATF22V10C — a 24-pin PLD offered in PLCC among other packages, rated down to 5 ns propagation delay with power dissipation as low as 10 µA typical — remains an active current product. And Microchip’s AT80C51RD2/AT87C51RD2 80C51-core microcontrollers, offered in PLCC44 with a −40 °C to operating temperature range, show an Active status through mainstream distributors. Before you design a PLCC part into new work, pull the manufacturer’s own lifecycle/PCN page for that exact part number — package alone tells you nothing about availability.

Counterfeit and Remarked-Part Risk

Because a large share of PLCC-housed parts are older and no longer in production, they are a common target for remarking. Documented techniques from counterfeit-screening literature include black-topping or sandblasting a part to erase its original marking before printing a new one, and repackaging recovered die — pulled from scrap boards — into a fresh PLCC body, which introduces defects such as missing bond wires, die contamination, or delamination that don’t show up until the part is in circuit. Inspection red flags worth checking on receipt: dual or conflicting markings on the top versus the side of the package, marking technique that doesn’t match the manufacturer’s known process (ink vs. laser), and spelling or font inconsistencies against a verified reference part. For volume buys of obsolete PLCC parts, franchised distribution or an automated counterfeit-screening rig — commercial testers exist that cover DIP, SOIC, PLCC, QFP, and BGA from the same fixture — is worth the cost against a field failure.

FAQ

What does PLCC stand for?

PLCC stands for plastic leaded chip carrier. It’s a molded-plastic, surface-mount IC package with J-shaped leads on all four sides, standardized under JEDEC MO-047 (square) and MO-052 (rectangular) at a fixed 1.27 mm lead pitch.

Is the PLCC package obsolete?

Not as a package type — new PLCC-housed parts are still sold. Individual part numbers vary widely: some CPLDs from the 1990s are marked Obsolete, while some PLDs and 8051-family microcontrollers in PLCC44 remain Active. Check the specific part number, not the package.

What is the difference between PLCC and QFP?

PLCC uses J-leads that fold under the body at a fixed 1.27 mm pitch and can be socketed; QFP uses gull-wing leads that extend outward at pitches from 0.4 to 1.0 mm and is rarely socketed. QFP supports higher pin counts and reflows more predictably at volume.

Can a PLCC package be socketed?

Yes. PLCC sockets are available in through-hole and SMT-mount styles conforming to JEDEC MS-016/MS-018 pin-count standards, typically with phosphor bronze contacts rated around 1 A per pin — useful for parts that need field reprogramming or swapping.

How many pins does a PLCC package have?

JEDEC-registered PLCC outlines run from 20 to 84 leads, always at 1.27 mm pitch. PLCC44 is the size most commonly still found in active designs today.

What is the lead pitch on a PLCC package?

1.27 mm (0.05 in), fixed across every PLCC size in the MO-047 and MO-052 families — it does not narrow as pin count increases, unlike QFP.

The Decision

Use PLCC when socketability or hand rework during bring-up matters more than board area or thermal headroom — that is the one thing it does that QFP and BGA don’t do as well. For a new production design above a few hundred units, check whether the same die is offered in QFP or BGA first; most active PLCC-housed logic and memory also ships in a flatter footprint that routes and reflows more predictably. If you’re locked into a PLCC-only legacy part, verify its lifecycle status with the manufacturer before you commit a BOM, and buy it through franchised distribution rather than an open marketplace to keep remarked stock out of the build.