Post: DIP-4 Package: Dimensions, Pinout and Footprint

DIP-4 Package: Dimensions, Pinout and Footprint

A DIP-4 is 7.62 mm between lead rows on 2.54 mm pitch, and it is almost always an optocoupler. That changes the design problem: the footprint is trivial, but the copper spacing around it is a safety requirement, not a layout preference. This page covers both.

Key takeaways

  • Pitch is 2.54 mm (0.100 in), row spacing 7.62 mm (0.300 in). Two leads per side, four holes total.
  • onsemi designates the package PDIP4 4.60 × 6.50 × 3.85 mm, 2.54P, across case outlines 646CA, 646CD and 709AH.
  • A wide-lead option spreads the rows to 10.16 mm (0.400 in) purely to buy creepage distance. Vishay calls it option 6.
  • Vishay specifies ≥ 7 mm creepage and clearance on the standard DIP-4, rising to ≥ 8 mm on the 400 mil version.
  • The isolation barrier runs across the middle of the package. Nothing conductive should cross it, including inner-layer copper.
  • These are cheap and plentiful. The LTV-817-A runs $0.34 at quantity 1 and $0.09353 at 25,000, with 9,384 in stock.

What is a DIP-4 package?

A DIP-4 package is a four-lead dual in-line package: a small molded body with two through-hole leads down each long side on 2.54 mm pitch, rows 7.62 mm apart. It mounts through plated holes or into a socket. In practice it holds one thing, an optocoupler, with an infrared LED on one side of an internal barrier and a phototransistor on the other.

Four pins is the minimum a single-channel optocoupler needs: LED anode and cathode on the input side, collector and emitter on the output side. Devices that also bring out the phototransistor base need six pins and move to DIP-6, which is why the 4N25 and 4N35 families are 6-pin while the PC817 and its clones are 4-pin.

DigiKey lists the LTV-817-A as 4-DIP (0.300″, 7.62mm) with supplier device package 4-DIP. That row spacing is the standard part. A 0.400 in variant exists and is discussed below.

[IMAGE 1: DIP-4 package outline drawing with body dimensions, row spacing, pitch, and the internal isolation barrier indicated | alt: “DIP-4 package dimensions diagram showing 2.54 mm pitch and 7.62 mm row spacing”]

DIP-4 dimensions

Two manufacturers, two ways of stating the same package. onsemi gives a compact designation; Vishay publishes the drawing detail.

DimensionValueSource
Lead pitch2.54 mm (0.100 in)onsemi PDIP4 designation
Row spacing, standard7.62 mm (0.300 in) typ.Vishay 83666 Rev. 2.6
Row spacing, wide option10.16 mm (0.400 in)Vishay option 6
Body width × length4.60 × 6.50 mmonsemi case 646CA / 646CD
Body height (case 709AH)3.85 mmonsemi case 709AH
Molded body width4.55 to 4.83 mmVishay 83666
Molded body length6.48 to 6.81 mmVishay 83666
Lead width0.76 to 1.14 mmVishay 83666
Lead length below seating3.30 to 3.81 mmVishay 83666
Lead thickness0.20 to 0.25 mmVishay 83666
Hole pattern length2.54 mmCalculated: 1 space × 2.54 mm

The hole pattern is the shortest of any DIP: a single 2.54 mm space per row. Everything about the physical footprint is small and forgiving. The lead width maximum of 1.14 mm is the one figure that is larger than you might expect, and it drives the drill size.

onsemi lists three case outlines for the same electrical part. Cases 646CA and 646CD are both PDIP4 4.6 × 6.5 mm, 2.54 mm pitch, issued 31 July 2016. Case 709AH adds the height, PDIP4 4.60 × 6.50 × 3.85 mm, issue B dated 6 July 2023. If your mechanical model needs a height, use 709AH.

Why the 400 mil wide-lead version exists

This is the part that separates DIP-4 from every other DIP size. The wide option does not exist to fit a bigger die. It exists to buy creepage distance across the isolation barrier.

Vishay quantifies both. On the standard DIP-4 the creepage and clearance distances are each ≥ 7 mm. On the 400 mil version, sold as option 6, both rise to ≥ 8 mm. Vishay notes that the option 6 and option 8 versions comply with IEC 60950 (DIN VDE 0805) for reinforced insulation up to an operating voltage of 400 VRMS or DC.

onsemi reports the same relationship on the FOD814 and FOD817: external clearance ≥ 7 mm on the standard part, and ≥ 10 mm for the 0.4 in lead spacing option. The exact figures differ by vendor, so take them from the datasheet of the part you are actually buying.

The design rule that follows: if your working voltage needs more than about 7 mm of creepage, specify the wide-lead part rather than trying to recover the distance on the board. Widening the footprint is free. Reworking a failed safety submission is not.

DIP-4 pinout and pin 1 identification

Pin 1 is marked by a dot, a notch, or a chamfer at one end. Orient the package with the marking at the top left and the leads pointing away from you. Numbering runs counterclockwise: down the left side to pin 2, across, and back up the right side.

For a DIP-4 that gives:

  • Pin 1, upper left: LED anode
  • Pin 2, lower left: LED cathode
  • Pin 3, lower right: phototransistor emitter
  • Pin 4, upper right: phototransistor collector

Vishay shows exactly this arrangement on the SFH610A: anode and cathode on pins 1 and 2, emitter and collector on pins 3 and 4. The convention is near-universal across single-channel 4-pin phototransistor optocouplers, which is what makes the PC817, LTV-817, EL817 and FOD817 broadly interchangeable.

One family-specific difference worth catching. The FOD814 uses two infrared diodes connected in inverse parallel on the input side, so pins 1 and 2 are anode/cathode in both directions and the part responds to AC input. The FOD817 has a single LED and is DC-only. Same package, same pin positions, different input behaviour.

[IMAGE 2: Top-down DIP-4 pinout diagram showing pin 1 dot, LED on the input side, phototransistor on the output side, and the isolation barrier down the centre | alt: “DIP-4 pinout diagram showing optocoupler LED anode cathode and phototransistor collector emitter”]

DIP-4 footprint: hole and pad sizing

Two holes per row on 2.54 mm pitch, rows at 7.62 mm or 10.16 mm for the wide option. Four holes total.

Size the hole from the maximum lead width. Vishay gives 0.76 to 1.14 mm for the DIP-4 lead, so the maximum is 1.14 mm. That is wider than the leads on most larger DIPs, because a four-pin package carries its mechanical support on only four legs.

Applying the IPC-2222 density levels to a 1.14 mm maximum lead:

  • Level A: minimum hole = max lead diameter + 0.25 mm → 1.14 + 0.25 = 1.39 mm
  • Level B: + 0.20 mm → 1.34 mm
  • Level C: + 0.15 mm → 1.29 mm

Then the pad. Pad diameter = minimum hole size + (2 × minimum annular ring) + minimum fabrication allowance, where the minimum annular ring is 0.05 mm and the fabrication allowance is 0.6 mm for Level A, 0.5 mm for Level B and 0.4 mm for Level C.

Level B worked through: 1.34 + (2 × 0.05) + 0.5 = 1.94 mm pad on a 1.34 mm hole.

Round the hole to a stocked 1.4 mm drill. A 2.0 mm pad on a 1.4 mm hole is a manufacturable Class 2 default. Note how much larger this is than the 0.8 to 0.9 mm holes used on higher pin-count DIPs. Do not copy a DIP-8 footprint and shrink it.

Check the lead width on your specific part before committing. Some 4-pin optocouplers use narrower leads than the Vishay figure, and oversized holes on a four-lead package reduce the mechanical grip that holds the part square during wave soldering.

Copper spacing is the real constraint, not the footprint

The footprint itself is four holes. The design work is in what surrounds them.

Creepage is the shortest path along the board surface between the input-side and output-side copper. It is governed by IEC 60664-1 and depends on working voltage, pollution degree and the CTI material group of your laminate, not on the optocoupler’s own isolation rating. Standard FR-4 sits in a lower CTI group than specialty laminates, which pushes the required distance up at the same voltage.

That is the most common misunderstanding around this package. A 5000 VRMS isolation rating on the datasheet describes the part, not your board. The copper spacing you need is a separate calculation.

Three practical rules:

  • Keep the barrier clear. No trace, via, plane pour or inner-layer copper should cross the centreline of the package. A via placed under the body silently shortens the creepage path below what the safety calculation assumed.
  • Do not tie the two grounds. Joining input and output ground during layout defeats the isolation entirely and lets input-side noise couple straight through.
  • Slot the board when spacing runs out. A routed cutout through the laminate extends the surface path. Texas Instruments notes that section 6.2 of IEC 60664-1 gives guidance on this, with minimum slot widths set by pollution degree. The slot lengthens creepage; it does not change clearance.

Library footprints

The KiCad Package_DIP library carries DIP-4 in these through-hole variants:

  • DIP-4_W7.62mm — the standard 300 mil part, plus a LongPads variant
  • DIP-4_W10.16mm — 400 mil, matching the wide-lead safety option, plus LongPads
  • DIP-4_W7.62mm_Socket and _Socket_LongPads — socket geometry
  • DIP-4_W7.62mm_SMDSocket_SmallPads and DIP-4_W8.89mm_SMDSocket_LongPads — SMD socket variants
  • SMDIP-4 at 7.62, 9.53 and 11.48 mm — surface-mount gullwing versions

The presence of a stock 10.16 mm entry is useful here. Unlike DIP-20, where the wide variant is missing from the library, DIP-4 gives you the safety-spaced footprint without drawing it yourself.

For surface-mount versions, check the standoff height. Vishay describes its option 7 gullwing lead form as having a maximum standoff of 0.9 mm and its option 8 wide gullwing form 0.5 mm, with option 8 giving the longer clearance distance required by VDE.

Availability and cost

DIP-4 optocouplers are among the cheapest active parts in any through-hole package. Verified DigiKey listings:

PartManufacturerPackageStatusQty-1Qty-25k
LTV-817-ALite-On4-DIP (0.300 in)Active$0.34$0.09353
LTV-817-CLite-On4-DIPActive$0.41
FOD817Consemi4-DIPActive$0.35
PC817CSHARP / Socle4-DIPActive$0.29
LTV-817SLite-On4-SMDActive$0.20040

The LTV-817-A shows 9,384 units in stock with a 12-week manufacturer standard lead time. Its price curve runs from $0.34 at one piece to $0.09353 at 25,000, a roughly 3.6:1 spread. That is a normal high-volume commodity curve, unlike the flat pricing on the memory-oriented DIP packages.

Surface-mount versions of the same die cost less than the through-hole ones, which is unusual. The LTV-817S at $0.20040 undercuts the DIP LTV-817-A at $0.34. If you are choosing between them on cost alone, SMD wins; the DIP earns its place through clearance, hand assembly and socketability.

Second-sourcing is straightforward. The PC817 pinout and CTR binning scheme are followed by Lite-On, onsemi, Everlight, Sharp and several others, so a footprint drawn for one usually accepts the rest. Confirm the CTR bin letter matches, since the suffix meaning is consistent across vendors but the guaranteed ranges are not always identical.

[IMAGE 3: A DIP-4 optocoupler on a board next to a wide-lead 400 mil version, with a routed isolation slot visible under the package | alt: “DIP-4 optocoupler beside a 400 mil wide-lead version on a board with an isolation slot”]

Design mistakes that cause rework

  • Treating the isolation rating as a board spec. A 5000 VRMS part rating says nothing about required copper spacing. Calculate creepage from working voltage, pollution degree and laminate CTI.
  • Routing under the package. Any trace, via or plane crossing the barrier centreline shortens the creepage path, including on inner layers.
  • Sizing the hole from a larger DIP. The DIP-4 lead runs to 1.14 mm maximum per Vishay. That needs a 1.4 mm drill, not the 0.8 mm used on a DIP-8.
  • Choosing the standard part when the wide one was needed. Going from 7 mm to 8 mm of creepage costs nothing at design time and is expensive to retrofit.
  • Sizing the LED resistor for room-temperature CTR. CTR degrades over life and falls at temperature. Vishay publishes normalized CTR against ambient temperature; design with margin at your worst case.
  • Assuming AC and DC input parts are interchangeable. The FOD814 has inverse-parallel LEDs and accepts AC input; the FOD817 does not. Same package, same pinout.

Frequently asked questions

What is a DIP-4 package?

A four-lead dual in-line package with two through-hole leads per side on 2.54 mm pitch, rows 7.62 mm apart. It is used almost exclusively for single-channel optocouplers, with an infrared LED on the input side and a phototransistor on the output side of an internal isolation barrier.

What are the dimensions of a DIP-4?

onsemi designates it PDIP4 4.60 × 6.50 × 3.85 mm at 2.54 mm pitch. Vishay gives molded body 4.55 to 4.83 mm wide by 6.48 to 6.81 mm long, lead width 0.76 to 1.14 mm and lead length below the seating plane of 3.30 to 3.81 mm.

What is the difference between DIP-4 and DIP-6 optocouplers?

DIP-6 brings out the phototransistor base as a third output pin, allowing base biasing or speed tuning. DIP-4 omits it. The 4N25 and 4N35 families are 6-pin; the PC817, LTV-817 and FOD817 families are 4-pin and otherwise similar in function.

Why do some DIP-4 optocouplers have 0.4 inch lead spacing?

To increase creepage distance across the isolation barrier. Vishay specifies at least 7 mm creepage and clearance on the standard DIP-4 and at least 8 mm on the 400 mil version, which supports reinforced insulation up to 400 VRMS under IEC 60950.

How do I identify pin 1 on a DIP-4?

Look for a dot, notch or chamfer at one end. With the marking at the upper left and leads pointing away, pin 1 is the LED anode, pin 2 the LED cathode, pin 3 the phototransistor emitter and pin 4 the collector.

What hole size should I use for a DIP-4 footprint?

Size from the 1.14 mm maximum lead width. IPC-2222 Level B gives 1.34 mm minimum and Level A gives 1.39 mm. Round to a 1.4 mm drill with a 2.0 mm pad. This is considerably larger than the drill used on higher pin-count DIPs.

What to do next

Start with the working voltage rather than the footprint. Calculate the creepage and clearance your application needs from IEC 60664-1, using your actual laminate CTI and pollution degree. That number decides whether you specify the standard 7.62 mm part or the 10.16 mm wide-lead version, and both have stock library footprints.

Then set the drill at 1.4 mm and keep the barrier clear on every layer. Those two choices cover most of what goes wrong with this package.

If the design is surface-mount elsewhere and the isolation requirement is modest, price the SMD version first: it is cheaper than the DIP here, which is unusual. Choose the through-hole body when you need the clearance, when the board is hand-assembled or serviced, or when a socket is part of the plan.

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